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authorKukjin Kim <kgene.kim@samsung.com>2013-01-31 16:54:38 -0800
committerKukjin Kim <kgene.kim@samsung.com>2013-02-03 16:17:10 -0800
commit09ec1d7ea67f6e23b6ef2178fa2ec48fd65477dc (patch)
tree38318b5c98f48754521a288f40e3c77a1fe8a623 /arch/arm/mach-s3c24xx/cpufreq-utils.c
parentf44ddba3635e35317057e976888d4a12dcb0f842 (diff)
downloadlinux-09ec1d7ea67f6e23b6ef2178fa2ec48fd65477dc.tar.bz2
ARM: S3C24XX: Remove plat-s3c24xx directory in arch/arm/
This patch is for just moving plat-s3c24xx/*.c into mach-s3c24xx/, so that we could remove plat-s3c24xx directory. But since the PLAT_S3C24XX is used in drivers, the statement is not deleted and it will be sorted out next time. Cc: Ben Dooks <ben-linux@fluff.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/cpufreq-utils.c')
-rw-r--r--arch/arm/mach-s3c24xx/cpufreq-utils.c63
1 files changed, 63 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c24xx/cpufreq-utils.c b/arch/arm/mach-s3c24xx/cpufreq-utils.c
new file mode 100644
index 000000000000..89e4e2b7a82e
--- /dev/null
+++ b/arch/arm/mach-s3c24xx/cpufreq-utils.c
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2009 Simtec Electronics
+ * http://armlinux.simtec.co.uk/
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C24XX CPU Frequency scaling - utils for S3C2410/S3C2440/S3C2442
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/cpufreq.h>
+#include <linux/io.h>
+
+#include <mach/map.h>
+#include <mach/regs-mem.h>
+#include <mach/regs-clock.h>
+
+#include <plat/cpu-freq-core.h>
+
+/**
+ * s3c2410_cpufreq_setrefresh - set SDRAM refresh value
+ * @cfg: The frequency configuration
+ *
+ * Set the SDRAM refresh value appropriately for the configured
+ * frequency.
+ */
+void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)
+{
+ struct s3c_cpufreq_board *board = cfg->board;
+ unsigned long refresh;
+ unsigned long refval;
+
+ /* Reduce both the refresh time (in ns) and the frequency (in MHz)
+ * down to ensure that we do not overflow 32 bit numbers.
+ *
+ * This should work for HCLK up to 133MHz and refresh period up
+ * to 30usec.
+ */
+
+ refresh = (cfg->freq.hclk / 100) * (board->refresh / 10);
+ refresh = DIV_ROUND_UP(refresh, (1000 * 1000)); /* apply scale */
+ refresh = (1 << 11) + 1 - refresh;
+
+ s3c_freq_dbg("%s: refresh value %lu\n", __func__, refresh);
+
+ refval = __raw_readl(S3C2410_REFRESH);
+ refval &= ~((1 << 12) - 1);
+ refval |= refresh;
+ __raw_writel(refval, S3C2410_REFRESH);
+}
+
+/**
+ * s3c2410_set_fvco - set the PLL value
+ * @cfg: The frequency configuration
+ */
+void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg)
+{
+ __raw_writel(cfg->pll.index, S3C2410_MPLLCON);
+}