diff options
author | Eric Miao <eric.miao@marvell.com> | 2009-01-20 11:04:16 +0800 |
---|---|---|
committer | Eric Miao <eric.miao@marvell.com> | 2009-03-09 21:22:40 +0800 |
commit | 5bf3df3f00f507119a26ba0780aa8799e741615c (patch) | |
tree | 3abb57be183566f7da8b8f718c6fdbbdcf9f993d /arch/arm/mach-pxa | |
parent | b74d1969083a8869659ad2b23138fc8a5ca97c53 (diff) | |
download | linux-5bf3df3f00f507119a26ba0780aa8799e741615c.tar.bz2 |
[ARM] pxa: separate definitions from pxa-regs.h and remove it finally
The remaining registers are separated into:
- <mach/regs-ost.h>
- <mach/regs-rtc.h>
- <mach/regs-intc.h>
and then we can remove pxa-regs.h completely. Instead of #include this
file, let's:
1. include the specific <mach/regs-*.h> with care (if that's absolutely
necessary)
2. define the registers in the driver, make cleanly defined API to expose
the register access to external with sufficient reason
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Diffstat (limited to 'arch/arm/mach-pxa')
-rw-r--r-- | arch/arm/mach-pxa/corgi_lcd.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-pxa/corgi_ssp.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/mtd-xip.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/pxa-regs.h | 82 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/pxa2xx-regs.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/regs-intc.h | 23 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/regs-ost.h | 34 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/regs-rtc.h | 23 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/system.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-pxa/irq.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-pxa/mioa701.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-pxa/reset.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-pxa/sharpsl_pm.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-pxa/sleep.S | 1 | ||||
-rw-r--r-- | arch/arm/mach-pxa/spitz_pm.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-pxa/standby.S | 1 | ||||
-rw-r--r-- | arch/arm/mach-pxa/time.c | 3 |
17 files changed, 87 insertions, 96 deletions
diff --git a/arch/arm/mach-pxa/corgi_lcd.c b/arch/arm/mach-pxa/corgi_lcd.c index 411607bc1fc2..d9b96319d498 100644 --- a/arch/arm/mach-pxa/corgi_lcd.c +++ b/arch/arm/mach-pxa/corgi_lcd.c @@ -22,7 +22,6 @@ #include <linux/string.h> #include <mach/corgi.h> #include <mach/hardware.h> -#include <mach/pxa-regs.h> #include <mach/sharpsl.h> #include <mach/spitz.h> #include <asm/hardware/scoop.h> diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c index 8e2f2215c4ba..a5ee70735e04 100644 --- a/arch/arm/mach-pxa/corgi_ssp.c +++ b/arch/arm/mach-pxa/corgi_ssp.c @@ -20,7 +20,6 @@ #include <asm/mach-types.h> #include <mach/ssp.h> -#include <mach/pxa-regs.h> #include <mach/pxa2xx-gpio.h> #include <mach/regs-ssp.h> #include "sharpsl.h" diff --git a/arch/arm/mach-pxa/include/mach/mtd-xip.h b/arch/arm/mach-pxa/include/mach/mtd-xip.h index cfca8155be72..297387ec3618 100644 --- a/arch/arm/mach-pxa/include/mach/mtd-xip.h +++ b/arch/arm/mach-pxa/include/mach/mtd-xip.h @@ -15,8 +15,8 @@ #ifndef __ARCH_PXA_MTD_XIP_H__ #define __ARCH_PXA_MTD_XIP_H__ -#include <mach/hardware.h> -#include <mach/pxa-regs.h> +#include <mach/regs-ost.h> +#include <mach/regs-intc.h> #define xip_irqpending() (ICIP & ICMR) diff --git a/arch/arm/mach-pxa/include/mach/pxa-regs.h b/arch/arm/mach-pxa/include/mach/pxa-regs.h deleted file mode 100644 index 7e1e33a41b81..000000000000 --- a/arch/arm/mach-pxa/include/mach/pxa-regs.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * arch/arm/mach-pxa/include/mach/pxa-regs.h - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __PXA_REGS_H -#define __PXA_REGS_H - -#include <mach/hardware.h> - -/* - * Real Time Clock - */ - -#define RCNR __REG(0x40900000) /* RTC Count Register */ -#define RTAR __REG(0x40900004) /* RTC Alarm Register */ -#define RTSR __REG(0x40900008) /* RTC Status Register */ -#define RTTR __REG(0x4090000C) /* RTC Timer Trim Register */ -#define PIAR __REG(0x40900038) /* Periodic Interrupt Alarm Register */ - -#define RTSR_PICE (1 << 15) /* Periodic interrupt count enable */ -#define RTSR_PIALE (1 << 14) /* Periodic interrupt Alarm enable */ -#define RTSR_HZE (1 << 3) /* HZ interrupt enable */ -#define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */ -#define RTSR_HZ (1 << 1) /* HZ rising-edge detected */ -#define RTSR_AL (1 << 0) /* RTC alarm detected */ - - -/* - * OS Timer & Match Registers - */ - -#define OSMR0 __REG(0x40A00000) /* */ -#define OSMR1 __REG(0x40A00004) /* */ -#define OSMR2 __REG(0x40A00008) /* */ -#define OSMR3 __REG(0x40A0000C) /* */ -#define OSMR4 __REG(0x40A00080) /* */ -#define OSCR __REG(0x40A00010) /* OS Timer Counter Register */ -#define OSCR4 __REG(0x40A00040) /* OS Timer Counter Register */ -#define OMCR4 __REG(0x40A000C0) /* */ -#define OSSR __REG(0x40A00014) /* OS Timer Status Register */ -#define OWER __REG(0x40A00018) /* OS Timer Watchdog Enable Register */ -#define OIER __REG(0x40A0001C) /* OS Timer Interrupt Enable Register */ - -#define OSSR_M3 (1 << 3) /* Match status channel 3 */ -#define OSSR_M2 (1 << 2) /* Match status channel 2 */ -#define OSSR_M1 (1 << 1) /* Match status channel 1 */ -#define OSSR_M0 (1 << 0) /* Match status channel 0 */ - -#define OWER_WME (1 << 0) /* Watchdog Match Enable */ - -#define OIER_E3 (1 << 3) /* Interrupt enable channel 3 */ -#define OIER_E2 (1 << 2) /* Interrupt enable channel 2 */ -#define OIER_E1 (1 << 1) /* Interrupt enable channel 1 */ -#define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */ - - -/* - * Interrupt Controller - */ - -#define ICIP __REG(0x40D00000) /* Interrupt Controller IRQ Pending Register */ -#define ICMR __REG(0x40D00004) /* Interrupt Controller Mask Register */ -#define ICLR __REG(0x40D00008) /* Interrupt Controller Level Register */ -#define ICFP __REG(0x40D0000C) /* Interrupt Controller FIQ Pending Register */ -#define ICPR __REG(0x40D00010) /* Interrupt Controller Pending Register */ -#define ICCR __REG(0x40D00014) /* Interrupt Controller Control Register */ - -#define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ -#define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */ -#define ICLR2 __REG(0x40D000A4) /* Interrupt Controller Level Register 2 */ -#define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */ -#define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */ - -#endif diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h index 2f834de5b748..4fcddd9cab76 100644 --- a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h +++ b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h @@ -14,7 +14,7 @@ #ifndef __PXA2XX_REGS_H #define __PXA2XX_REGS_H -#include <mach/pxa-regs.h> +#include <mach/hardware.h> /* * PXA Chip selects diff --git a/arch/arm/mach-pxa/include/mach/regs-intc.h b/arch/arm/mach-pxa/include/mach/regs-intc.h new file mode 100644 index 000000000000..ad23e74b762f --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/regs-intc.h @@ -0,0 +1,23 @@ +#ifndef __ASM_MACH_REGS_INTC_H +#define __ASM_MACH_REGS_INTC_H + +#include <mach/hardware.h> + +/* + * Interrupt Controller + */ + +#define ICIP __REG(0x40D00000) /* Interrupt Controller IRQ Pending Register */ +#define ICMR __REG(0x40D00004) /* Interrupt Controller Mask Register */ +#define ICLR __REG(0x40D00008) /* Interrupt Controller Level Register */ +#define ICFP __REG(0x40D0000C) /* Interrupt Controller FIQ Pending Register */ +#define ICPR __REG(0x40D00010) /* Interrupt Controller Pending Register */ +#define ICCR __REG(0x40D00014) /* Interrupt Controller Control Register */ + +#define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ +#define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */ +#define ICLR2 __REG(0x40D000A4) /* Interrupt Controller Level Register 2 */ +#define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */ +#define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */ + +#endif /* __ASM_MACH_REGS_INTC_H */ diff --git a/arch/arm/mach-pxa/include/mach/regs-ost.h b/arch/arm/mach-pxa/include/mach/regs-ost.h new file mode 100644 index 000000000000..a3e5f86ef67e --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/regs-ost.h @@ -0,0 +1,34 @@ +#ifndef __ASM_MACH_REGS_OST_H +#define __ASM_MACH_REGS_OST_H + +#include <mach/hardware.h> + +/* + * OS Timer & Match Registers + */ + +#define OSMR0 __REG(0x40A00000) /* */ +#define OSMR1 __REG(0x40A00004) /* */ +#define OSMR2 __REG(0x40A00008) /* */ +#define OSMR3 __REG(0x40A0000C) /* */ +#define OSMR4 __REG(0x40A00080) /* */ +#define OSCR __REG(0x40A00010) /* OS Timer Counter Register */ +#define OSCR4 __REG(0x40A00040) /* OS Timer Counter Register */ +#define OMCR4 __REG(0x40A000C0) /* */ +#define OSSR __REG(0x40A00014) /* OS Timer Status Register */ +#define OWER __REG(0x40A00018) /* OS Timer Watchdog Enable Register */ +#define OIER __REG(0x40A0001C) /* OS Timer Interrupt Enable Register */ + +#define OSSR_M3 (1 << 3) /* Match status channel 3 */ +#define OSSR_M2 (1 << 2) /* Match status channel 2 */ +#define OSSR_M1 (1 << 1) /* Match status channel 1 */ +#define OSSR_M0 (1 << 0) /* Match status channel 0 */ + +#define OWER_WME (1 << 0) /* Watchdog Match Enable */ + +#define OIER_E3 (1 << 3) /* Interrupt enable channel 3 */ +#define OIER_E2 (1 << 2) /* Interrupt enable channel 2 */ +#define OIER_E1 (1 << 1) /* Interrupt enable channel 1 */ +#define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */ + +#endif /* __ASM_MACH_REGS_OST_H */ diff --git a/arch/arm/mach-pxa/include/mach/regs-rtc.h b/arch/arm/mach-pxa/include/mach/regs-rtc.h new file mode 100644 index 000000000000..f0e4a589bbe1 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/regs-rtc.h @@ -0,0 +1,23 @@ +#ifndef __ASM_MACH_REGS_RTC_H +#define __ASM_MACH_REGS_RTC_H + +#include <mach/hardware.h> + +/* + * Real Time Clock + */ + +#define RCNR __REG(0x40900000) /* RTC Count Register */ +#define RTAR __REG(0x40900004) /* RTC Alarm Register */ +#define RTSR __REG(0x40900008) /* RTC Status Register */ +#define RTTR __REG(0x4090000C) /* RTC Timer Trim Register */ +#define PIAR __REG(0x40900038) /* Periodic Interrupt Alarm Register */ + +#define RTSR_PICE (1 << 15) /* Periodic interrupt count enable */ +#define RTSR_PIALE (1 << 14) /* Periodic interrupt Alarm enable */ +#define RTSR_HZE (1 << 3) /* HZ interrupt enable */ +#define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */ +#define RTSR_HZ (1 << 1) /* HZ rising-edge detected */ +#define RTSR_AL (1 << 0) /* RTC alarm detected */ + +#endif /* __ASM_MACH_REGS_RTC_H */ diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h index 0f381e692999..0a587c4ec709 100644 --- a/arch/arm/mach-pxa/include/mach/system.h +++ b/arch/arm/mach-pxa/include/mach/system.h @@ -13,7 +13,6 @@ #include <asm/proc-fns.h> #include "hardware.h" #include "pxa2xx-regs.h" -#include "pxa-regs.h" static inline void arch_idle(void) { diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index d3d40a31f9da..f6e0300e4f64 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c @@ -20,8 +20,8 @@ #include <mach/hardware.h> #include <asm/irq.h> #include <asm/mach/irq.h> -#include <mach/pxa-regs.h> #include <mach/gpio.h> +#include <mach/regs-intc.h> #include "generic.h" diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index dbda65f0e048..e77c95ca67f0 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c @@ -41,6 +41,7 @@ #include <asm/mach/arch.h> #include <mach/pxa27x.h> +#include <mach/regs-rtc.h> #include <mach/pxa27x_keypad.h> #include <mach/pxafb.h> #include <mach/mmc.h> diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c index 00b2dc2a1074..867c95c09618 100644 --- a/arch/arm/mach-pxa/reset.c +++ b/arch/arm/mach-pxa/reset.c @@ -10,7 +10,7 @@ #include <linux/io.h> #include <asm/proc-fns.h> -#include <mach/pxa-regs.h> +#include <mach/regs-ost.h> #include <mach/reset.h> unsigned int reset_status; diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c index f0845c1b001c..16b4ec67e3b6 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.c +++ b/arch/arm/mach-pxa/sharpsl_pm.c @@ -25,7 +25,6 @@ #include <mach/hardware.h> #include <asm/mach-types.h> #include <mach/pm.h> -#include <mach/pxa-regs.h> #include <mach/pxa2xx-gpio.h> #include <mach/sharpsl.h> #include "sharpsl.h" diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S index a62c8375eb53..2ed95f369cfc 100644 --- a/arch/arm/mach-pxa/sleep.S +++ b/arch/arm/mach-pxa/sleep.S @@ -15,7 +15,6 @@ #include <asm/assembler.h> #include <mach/hardware.h> -#include <mach/pxa-regs.h> #include <mach/pxa2xx-regs.h> #define MDREFR_KDIV 0x200a4000 // all banks diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index 072e77cfe5a3..2e4490562c9e 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c @@ -24,7 +24,6 @@ #include <mach/sharpsl.h> #include <mach/spitz.h> -#include <mach/pxa-regs.h> #include <mach/pxa2xx-regs.h> #include <mach/pxa2xx-gpio.h> #include "sharpsl.h" diff --git a/arch/arm/mach-pxa/standby.S b/arch/arm/mach-pxa/standby.S index f3821cfda72f..29f5f5c180b7 100644 --- a/arch/arm/mach-pxa/standby.S +++ b/arch/arm/mach-pxa/standby.S @@ -13,7 +13,6 @@ #include <asm/assembler.h> #include <mach/hardware.h> -#include <mach/pxa-regs.h> #include <mach/pxa2xx-regs.h> .text diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index 95656a72268d..8eb3830fbb0b 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c @@ -22,8 +22,7 @@ #include <asm/div64.h> #include <asm/mach/irq.h> #include <asm/mach/time.h> -#include <mach/hardware.h> -#include <mach/pxa-regs.h> +#include <mach/regs-ost.h> /* * This is PXA's sched_clock implementation. This has a resolution |