diff options
author | Simon Arlott <simon@fire.lp0.eu> | 2007-05-11 20:40:30 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-05-20 20:10:32 +0100 |
commit | 6cbdc8c5357276307a77deeada3f04626ff17da6 (patch) | |
tree | e0a4190d816fa4efb6ddb331b859bf0d5eb9c1a3 /arch/arm/mach-pxa/corgi_lcd.c | |
parent | fc432e1952a3899ce35e84b417e5d60f74cb901b (diff) | |
download | linux-6cbdc8c5357276307a77deeada3f04626ff17da6.tar.bz2 |
[ARM] spelling fixes
Spelling fixes in arch/arm/.
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-pxa/corgi_lcd.c')
-rw-r--r-- | arch/arm/mach-pxa/corgi_lcd.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-pxa/corgi_lcd.c b/arch/arm/mach-pxa/corgi_lcd.c index a72476c24621..365b9435f748 100644 --- a/arch/arm/mach-pxa/corgi_lcd.c +++ b/arch/arm/mach-pxa/corgi_lcd.c @@ -40,7 +40,7 @@ #define PICTRL_ADRS 0x06 #define POLCTRL_ADRS 0x07 -/* Resgister Bit Definitions */ +/* Register Bit Definitions */ #define RESCTL_QVGA 0x01 #define RESCTL_VGA 0x00 @@ -55,11 +55,11 @@ #define POWER0_COM_DCLK 0x01 /* COM Voltage DC Bias DAC Serial Data Clock */ #define POWER0_COM_DOUT 0x02 /* COM Voltage DC Bias DAC Serial Data Out */ #define POWER0_DAC_ON 0x04 /* DAC Power Supply ON */ -#define POWER0_COM_ON 0x08 /* COM Powewr Supply ON */ +#define POWER0_COM_ON 0x08 /* COM Power Supply ON */ #define POWER0_VCC5_ON 0x10 /* VCC5 Power Supply ON */ #define POWER0_DAC_OFF 0x00 /* DAC Power Supply OFF */ -#define POWER0_COM_OFF 0x00 /* COM Powewr Supply OFF */ +#define POWER0_COM_OFF 0x00 /* COM Power Supply OFF */ #define POWER0_VCC5_OFF 0x00 /* VCC5 Power Supply OFF */ #define PICTRL_INIT_STATE 0x01 @@ -145,7 +145,7 @@ static void lcdtg_set_common_voltage(u8 base_data, u8 data) lcdtg_i2c_send_stop(base_data); } -/* Set Phase Adjuct */ +/* Set Phase Adjust */ static void lcdtg_set_phadadj(int mode) { int adj; @@ -226,7 +226,7 @@ static void lcdtg_hw_init(int mode) /* Signals output enable */ corgi_ssp_lcdtg_send(PICTRL_ADRS, 0); - /* Set Phase Adjuct */ + /* Set Phase Adjust */ lcdtg_set_phadadj(mode); /* Initialize for Input Signals from ATI */ |