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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-07-26 17:09:31 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-07-26 17:09:31 -0700 |
| commit | 4b30b6f23a1a59cda29cc12566eb4f32a22a8069 (patch) | |
| tree | 69e262a5065ce8be21c919febd29d5d9660f3e97 /arch/arm/mach-prima2/include/mach/entry-macro.S | |
| parent | 38da590bef19f23d4b610aecaad4f32de483890d (diff) | |
| parent | 6c59c115b0f295434cc4f917d180fecd84d39f81 (diff) | |
| download | linux-4b30b6f23a1a59cda29cc12566eb4f32a22a8069.tar.bz2 | |
Merge branch 'next/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc:
MAINTAINERS: add maintainer of CSR SiRFprimaII machine
ARM: CSR: initializing L2 cache
ARM: CSR: mapping early DEBUG_LL uart
ARM: CSR: Adding CSR SiRFprimaII board support
OMAP4: clocks: Update the clock tree with 4460 clock nodes
OMAP4: PRCM: OMAP4460 specific PRM and CM register bitshifts
OMAP4: ID: add omap_has_feature for max freq supported
OMAP: ID: introduce chip detection for OMAP4460
ARM: Xilinx: merge board file into main platform code
ARM: Xilinx: Adding Xilinx board support
Fix up conflicts in arch/arm/mach-omap2/cm-regbits-44xx.h
Diffstat (limited to 'arch/arm/mach-prima2/include/mach/entry-macro.S')
| -rw-r--r-- | arch/arm/mach-prima2/include/mach/entry-macro.S | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/mach-prima2/include/mach/entry-macro.S b/arch/arm/mach-prima2/include/mach/entry-macro.S new file mode 100644 index 000000000000..1c8a50f102a7 --- /dev/null +++ b/arch/arm/mach-prima2/include/mach/entry-macro.S @@ -0,0 +1,29 @@ +/* + * arch/arm/mach-prima2/include/mach/entry-macro.S + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#include <mach/hardware.h> + +#define SIRFSOC_INT_ID 0x38 + + .macro get_irqnr_preamble, base, tmp + ldr \base, =sirfsoc_intc_base + ldr \base, [\base] + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + ldr \irqnr, [\base, #SIRFSOC_INT_ID] @ Get the highest priority irq + cmp \irqnr, #0x40 @ the irq num can't be larger than 0x3f + movges \irqnr, #0 + .endm + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + |