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authorLennert Buytenhek <buytenh@wantstofly.org>2008-03-27 14:51:39 -0400
committerNicolas Pitre <nico@marvell.com>2008-03-27 14:51:39 -0400
commit83b6d822e4237052371e771b1f994823615a5341 (patch)
treeb129c2ed5bdad53710d9a0396359d184cf3eb913 /arch/arm/mach-orion
parentabc848c182960118fbb7cdae397b5608c5bcef1b (diff)
downloadlinux-83b6d822e4237052371e771b1f994823615a5341.tar.bz2
Orion: initialise mbus DRAM target info on boot
Initialise orion_mbus_dram_info on boot, and prepare for passing this info into peripheral drivers. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch/arm/mach-orion')
-rw-r--r--arch/arm/mach-orion/addr-map.c29
-rw-r--r--arch/arm/mach-orion/common.c1
-rw-r--r--arch/arm/mach-orion/common.h1
3 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/mach-orion/addr-map.c b/arch/arm/mach-orion/addr-map.c
index 58cc3c0333b6..ab4484cc14b7 100644
--- a/arch/arm/mach-orion/addr-map.c
+++ b/arch/arm/mach-orion/addr-map.c
@@ -12,6 +12,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/mbus.h>
#include <asm/hardware.h>
#include "common.h"
@@ -168,6 +169,9 @@
#define SATA_WIN_BASE(win) ORION_SATA_REG(0x34 + ((win) * 0x10))
#define SATA_MAX_WIN 4
+
+struct mbus_dram_target_info orion_mbus_dram_info;
+
static int __init orion_cpu_win_can_remap(u32 win)
{
u32 dev, rev;
@@ -257,6 +261,7 @@ void __init orion_setup_cpu_win(enum orion_target target, u32 base, u32 size, in
void __init orion_setup_cpu_wins(void)
{
int i;
+ int cs;
/*
* First, disable and clear windows
@@ -281,6 +286,30 @@ void __init orion_setup_cpu_wins(void)
ORION_PCIE_MEM_SIZE, -1);
orion_setup_cpu_win(ORION_PCI_MEM, ORION_PCI_MEM_PHYS_BASE,
ORION_PCI_MEM_SIZE, -1);
+
+ /*
+ * Setup MBUS dram target info.
+ */
+ orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
+
+ for (i = 0, cs = 0; i < 4; i++) {
+ u32 base = readl(DDR_BASE_CS(i));
+ u32 size = readl(DDR_SIZE_CS(i));
+
+ /*
+ * Chip select enabled?
+ */
+ if (size & 1) {
+ struct mbus_dram_window *w;
+
+ w = &orion_mbus_dram_info.cs[cs++];
+ w->cs_index = i;
+ w->mbus_attr = 0xf & ~(1 << i);
+ w->base = base & 0xff000000;
+ w->size = (size | 0x00ffffff) + 1;
+ }
+ }
+ orion_mbus_dram_info.num_cs = cs;
}
/*
diff --git a/arch/arm/mach-orion/common.c b/arch/arm/mach-orion/common.c
index bbc2b4ec932c..cd9aa43bb474 100644
--- a/arch/arm/mach-orion/common.c
+++ b/arch/arm/mach-orion/common.c
@@ -14,6 +14,7 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
+#include <linux/mbus.h>
#include <linux/mv643xx_eth.h>
#include <linux/mv643xx_i2c.h>
#include <asm/page.h>
diff --git a/arch/arm/mach-orion/common.h b/arch/arm/mach-orion/common.h
index 501497cc2c4d..2718245ec4ae 100644
--- a/arch/arm/mach-orion/common.h
+++ b/arch/arm/mach-orion/common.h
@@ -29,6 +29,7 @@ enum orion_target {
ORION_MAX_TARGETS
};
+extern struct mbus_dram_target_info orion_mbus_dram_info;
void orion_setup_cpu_win(enum orion_target target, u32 base, u32 size, int remap);
void orion_setup_cpu_wins(void);
void orion_setup_eth_wins(void);