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authorLinus Torvalds <torvalds@linux-foundation.org>2017-08-04 15:12:15 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2017-08-04 15:12:15 -0700
commit65f4740e72991fd565791b86b6cf8725fc8eb5bc (patch)
treeb34b68b99096ab66d83319b12f9850a3142a7445 /arch/arm/mach-omap2/prm44xx.c
parentb3c6858fb172512f63838523ae7817ae8adec564 (diff)
parent41c454fa0e86e3d186abfe1598645ead667da4ac (diff)
downloadlinux-65f4740e72991fd565791b86b6cf8725fc8eb5bc.tar.bz2
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann: "This comes a bit later than I planned, and as a consequence is a larger than it should be. Most of the changes are devicetree fixes, across lots of platforms: Renesas, Samsung Exynos, Marvell EBU, TI OMAP, Rockchips, Amlogic Meson, Sigma Desings Tango, Allwinner SUNxi and TI Davinci. Also across many platforms, I applied an older series of simple randconfig build fixes. This includes making the CONFIG_MTD_XIP option compile again, which had been broken for many years and probably has not been missed, but it felt wrong to just remove it completely. The only other changes are: - We enable HWSPINLOCK in defconfig to get some Qualcomm boards to work out of the box. - A few regression fixes for Texas Instruments OMAP2+. - A boot regression fix for the Renesas regulator quirk. - A suspend/resume fix for Uniphier SoCs, fixing the resume of the system bus" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (43 commits) ARM: dts: tango4: Request RGMII RX and TX clock delays bus: uniphier-system-bus: set up registers when resuming ARM64: dts: marvell: armada-37xx: Fix the number of GPIO on south bridge ARM: shmobile: rcar-gen2: Fix deadlock in regulator quirk arm64: defconfig: enable missing HWSPINLOCK ARM: pxa: select both FB and FB_W100 for eseries ARM: ixp4xx: fix ioport_unmap definition ARM: ep93xx: use ARM_PATCH_PHYS_VIRT correctly ARM: mmp: mark usb_dma_mask as __maybe_unused ARM: omap2: mark unused functions as __maybe_unused ARM: omap1: avoid unused variable warning ARM: sirf: mark sirfsoc_init_late as __maybe_unused ARM: ixp4xx: use normal prototype for {read,write}s{b,w,l} ARM: omap1/ams-delta: warn about failed regulator enable ARM: rpc: rename RAM_SIZE macro ARM: w90x900: normalize clk API ARM: ep93xx: normalize clk API ARM: dts: sun8i: a83t: Switch to CCU device tree binding macros arm64: allwinner: sun50i-a64: Correct emac register size ARM: dts: sunxi: h3/h5: Correct emac register size ...
Diffstat (limited to 'arch/arm/mach-omap2/prm44xx.c')
-rw-r--r--arch/arm/mach-omap2/prm44xx.c55
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 87e86a4a9ead..3ab5df1ce900 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -337,6 +337,27 @@ static void omap44xx_prm_reconfigure_io_chain(void)
}
/**
+ * omap44xx_prm_enable_io_wakeup - enable wakeup events from I/O wakeup latches
+ *
+ * Activates the I/O wakeup event latches and allows events logged by
+ * those latches to signal a wakeup event to the PRCM. For I/O wakeups
+ * to occur, WAKEUPENABLE bits must be set in the pad mux registers, and
+ * omap44xx_prm_reconfigure_io_chain() must be called. No return value.
+ */
+static void __init omap44xx_prm_enable_io_wakeup(void)
+{
+ s32 inst = omap4_prmst_get_prm_dev_inst();
+
+ if (inst == PRM_INSTANCE_UNKNOWN)
+ return;
+
+ omap4_prm_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK,
+ OMAP4430_GLOBAL_WUEN_MASK,
+ inst,
+ omap4_prcm_irq_setup.pm_ctrl);
+}
+
+/**
* omap44xx_prm_read_reset_sources - return the last SoC reset source
*
* Return a u32 representing the last reset sources of the SoC. The
@@ -668,6 +689,8 @@ struct pwrdm_ops omap4_pwrdm_operations = {
.pwrdm_has_voltdm = omap4_check_vcvp,
};
+static int omap44xx_prm_late_init(void);
+
/*
* XXX document
*/
@@ -675,6 +698,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
.read_reset_sources = &omap44xx_prm_read_reset_sources,
.was_any_context_lost_old = &omap44xx_prm_was_any_context_lost_old,
.clear_context_loss_flags_old = &omap44xx_prm_clear_context_loss_flags_old,
+ .late_init = &omap44xx_prm_late_init,
.assert_hardreset = omap4_prminst_assert_hardreset,
.deassert_hardreset = omap4_prminst_deassert_hardreset,
.is_hardreset_asserted = omap4_prminst_is_hardreset_asserted,
@@ -711,6 +735,37 @@ int __init omap44xx_prm_init(const struct omap_prcm_init_data *data)
return prm_register(&omap44xx_prm_ll_data);
}
+static int omap44xx_prm_late_init(void)
+{
+ int irq_num;
+
+ if (!(prm_features & PRM_HAS_IO_WAKEUP))
+ return 0;
+
+ irq_num = of_irq_get(prm_init_data->np, 0);
+ /*
+ * Already have OMAP4 IRQ num. For all other platforms, we need
+ * IRQ numbers from DT
+ */
+ if (irq_num < 0 && !(prm_init_data->flags & PRM_IRQ_DEFAULT)) {
+ if (irq_num == -EPROBE_DEFER)
+ return irq_num;
+
+ /* Have nothing to do */
+ return 0;
+ }
+
+ /* Once OMAP4 DT is filled as well */
+ if (irq_num >= 0) {
+ omap4_prcm_irq_setup.irq = irq_num;
+ omap4_prcm_irq_setup.xlate_irq = NULL;
+ }
+
+ omap44xx_prm_enable_io_wakeup();
+
+ return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);
+}
+
static void __exit omap44xx_prm_exit(void)
{
prm_unregister(&omap44xx_prm_ll_data);