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authorRajendra Nayak <rnayak@ti.com>2009-12-08 18:47:16 -0700
committerpaul <paul@twilight.(none)>2009-12-11 17:00:46 -0700
commita1391d276866845018920329bc2a3a82ab322af8 (patch)
treea16a46b6d0af3cb5e3dcd4f7de207f138d087011 /arch/arm/mach-omap2/clock34xx.h
parentd79b126724554122d9598834ef39fb0bb4fc132d (diff)
downloadlinux-a1391d276866845018920329bc2a3a82ab322af8.tar.bz2
ARM: OMAP4: PM: Move DPLL control apis to dpll.c
This patch moves all the dpll control api's to a common file dpll.c. This is in preperation of omap4 support wherein most of these api's can be reused. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock34xx.h')
-rw-r--r--arch/arm/mach-omap2/clock34xx.h11
1 files changed, 0 insertions, 11 deletions
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index b08809efb0c8..9a2c07eac9ad 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -8,21 +8,10 @@
#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_34XX_H
#define __ARCH_ARM_MACH_OMAP2_CLOCK_34XX_H
-unsigned long omap3_dpll_recalc(struct clk *clk);
-unsigned long omap3_clkoutx2_recalc(struct clk *clk);
-void omap3_dpll_allow_idle(struct clk *clk);
-void omap3_dpll_deny_idle(struct clk *clk);
-u32 omap3_dpll_autoidle_read(struct clk *clk);
-int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate);
int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate);
int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate);
void omap3_clk_lock_dpll5(void);
-/* CM_CLKEN_PLL*.EN* bit values - not all are available for every DPLL */
-#define DPLL_LOW_POWER_STOP 0x1
-#define DPLL_LOW_POWER_BYPASS 0x5
-#define DPLL_LOCKED 0x7
-
extern struct clk *sdrc_ick_p;
extern struct clk *arm_fck_p;