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author | Juergen Beisert <jbe@pengutronix.de> | 2009-10-02 11:24:49 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2009-11-14 10:30:18 +0100 |
commit | 9e0afdf8f32f34f7e67db4d4622cb13e39a0e5db (patch) | |
tree | 73a1d4dec14f69c0c35780d94bf53776155c07ef /arch/arm/mach-mx3/clock-imx35.c | |
parent | 060d20d32ae7c6a20a8eac465795ed5bc9b37f7c (diff) | |
download | linux-9e0afdf8f32f34f7e67db4d4622cb13e39a0e5db.tar.bz2 |
MXC NFC: Add the clock resource to support NFC in i.MX35
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx3/clock-imx35.c')
-rw-r--r-- | arch/arm/mach-mx3/clock-imx35.c | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c index c595260ec1f9..33a23e7c7e92 100644 --- a/arch/arm/mach-mx3/clock-imx35.c +++ b/arch/arm/mach-mx3/clock-imx35.c @@ -387,6 +387,35 @@ DEFINE_CLOCK(csi_clk, 0, CCM_CGR3, 0, get_rate_csi, NULL); DEFINE_CLOCK(iim_clk, 0, CCM_CGR3, 2, NULL, NULL); DEFINE_CLOCK(gpu2d_clk, 0, CCM_CGR3, 4, NULL, NULL); +static int clk_dummy_enable(struct clk *clk) +{ + return 0; +} + +static void clk_dummy_disable(struct clk *clk) +{ +} + +static unsigned long get_rate_nfc(struct clk *clk) +{ + unsigned long div1; + + div1 = (__raw_readl(CCM_BASE + CCM_PDR4) >> 28) + 1; + + return get_rate_ahb(NULL) / div1; +} + +/* NAND Controller: It seems it can't be disabled */ +static struct clk nfc_clk = { + .id = 0, + .enable_reg = 0, + .enable_shift = 0, + .get_rate = get_rate_nfc, + .set_rate = NULL, /* set_rate_nfc, */ + .enable = clk_dummy_enable, + .disable = clk_dummy_disable +}; + #define _REGISTER_CLOCK(d, n, c) \ { \ .dev_id = d, \ @@ -449,6 +478,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, "csi", csi_clk) _REGISTER_CLOCK(NULL, "iim", iim_clk) _REGISTER_CLOCK(NULL, "gpu2d", gpu2d_clk) + _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) }; int __init mx35_clocks_init() |