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author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-28 14:03:14 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-28 14:03:14 -0700 |
commit | 0fe41b8982001cd14ee2c77cd776735a5024e98b (patch) | |
tree | 83e65d595c413d55259ea14fb97748ce5efe5707 /arch/arm/mach-mmp/pxa168.c | |
parent | eedf2c5296a8dfaaf9aec1a938c1d3bd73159a30 (diff) | |
parent | 9759d22c8348343b0da4e25d6150c41712686c14 (diff) | |
download | linux-0fe41b8982001cd14ee2c77cd776735a5024e98b.tar.bz2 |
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (422 commits)
[ARM] 5435/1: fix compile warning in sanity_check_meminfo()
[ARM] 5434/1: ARM: OMAP: Fix mailbox compile for 24xx
[ARM] pxa: fix the bad assumption that PCMCIA sockets always start with 0
[ARM] pxa: fix Colibri PXA300 and PXA320 LCD backlight pins
imxfb: Fix TFT mode
i.MX21/27: remove ifdef CONFIG_FB_IMX
imxfb: add clock support
mxc: add arch_reset() function
clkdev: add possibility to get a clock based on the device name
i.MX1: remove fb support from mach-imx
[ARM] pxa: build arch/arm/plat-pxa/mfp.c only when PXA3xx or ARCH_MMP defined
Gemini: Add support for Teltonika RUT100
Gemini: gpiolib based GPIO support v2
MAINTAINERS: add myself as Gemini architecture maintainer
ARM: Add Gemini architecture v3
[ARM] OMAP: Fix compile for omap2_init_common_hw()
MAINTAINERS: Add myself as Faraday ARM core variant maintainer
ARM: Add support for FA526 v2
[ARM] acorn,ebsa110,footbridge,integrator,sa1100: Convert asm/io.h to linux/io.h
[ARM] collie: fix two minor formatting nits
...
Diffstat (limited to 'arch/arm/mach-mmp/pxa168.c')
-rw-r--r-- | arch/arm/mach-mmp/pxa168.c | 111 |
1 files changed, 111 insertions, 0 deletions
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c new file mode 100644 index 000000000000..ae924468658c --- /dev/null +++ b/arch/arm/mach-mmp/pxa168.c @@ -0,0 +1,111 @@ +/* + * linux/arch/arm/mach-mmp/pxa168.c + * + * Code specific to PXA168 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/list.h> +#include <linux/io.h> +#include <linux/clk.h> + +#include <asm/mach/time.h> +#include <mach/addr-map.h> +#include <mach/cputype.h> +#include <mach/regs-apbc.h> +#include <mach/irqs.h> +#include <mach/gpio.h> +#include <mach/dma.h> +#include <mach/devices.h> +#include <mach/mfp.h> + +#include "common.h" +#include "clock.h" + +#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) + +static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata = +{ + MFP_ADDR_X(GPIO0, GPIO36, 0x04c), + MFP_ADDR_X(GPIO37, GPIO55, 0x000), + MFP_ADDR_X(GPIO56, GPIO123, 0x0e0), + MFP_ADDR_X(GPIO124, GPIO127, 0x0f4), + + MFP_ADDR_END, +}; + +#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c) + +static void __init pxa168_init_gpio(void) +{ + int i; + + /* enable GPIO clock */ + __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA168_GPIO); + + /* unmask GPIO edge detection for all 4 banks - APMASKx */ + for (i = 0; i < 4; i++) + __raw_writel(0xffffffff, APMASK(i)); + + pxa_init_gpio(IRQ_PXA168_GPIOX, 0, 127, NULL); +} + +void __init pxa168_init_irq(void) +{ + icu_init_irq(); + pxa168_init_gpio(); +} + +/* APB peripheral clocks */ +static APBC_CLK(uart1, PXA168_UART1, 1, 14745600); +static APBC_CLK(uart2, PXA168_UART2, 1, 14745600); + +/* device and clock bindings */ +static struct clk_lookup pxa168_clkregs[] = { + INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), + INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL), +}; + +static int __init pxa168_init(void) +{ + if (cpu_is_pxa168()) { + mfp_init_base(MFPR_VIRT_BASE); + mfp_init_addr(pxa168_mfp_addr_map); + pxa_init_dma(IRQ_PXA168_DMA_INT0, 32); + clks_register(ARRAY_AND_SIZE(pxa168_clkregs)); + } + + return 0; +} +postcore_initcall(pxa168_init); + +/* system timer - clock enabled, 3.25MHz */ +#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3)) + +static void __init pxa168_timer_init(void) +{ + /* this is early, we have to initialize the CCU registers by + * ourselves instead of using clk_* API. Clock rate is defined + * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running + */ + __raw_writel(APBC_APBCLK | APBC_RST, APBC_PXA168_TIMERS); + + /* 3.25MHz, bus/functional clock enabled, release reset */ + __raw_writel(TIMER_CLK_RST, APBC_PXA168_TIMERS); + + timer_init(IRQ_PXA168_TIMER1); +} + +struct sys_timer pxa168_timer = { + .init = pxa168_timer_init, +}; + +/* on-chip devices */ +PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22); +PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24); |