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authorAndrew Lunn <andrew@lunn.ch>2012-03-08 21:45:59 +0100
committerMike Turquette <mturquette@linaro.org>2012-05-08 16:34:02 -0700
commit27e53cfbce493bb062212263aa24bbbc5a1077f4 (patch)
treea017e6bcfa6f5ebeb152475c8b3b19fefd73b902 /arch/arm/mach-kirkwood/common.c
parentc510182b1c68e2f2bf61e69f6c65bcf61a188809 (diff)
downloadlinux-27e53cfbce493bb062212263aa24bbbc5a1077f4.tar.bz2
ARM: Orion: PCIE: Add support for clk
Prepare and enable the clocks when the board indicates the pcie buses will be used. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Jamie Lentin <jm@lentin.co.uk> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'arch/arm/mach-kirkwood/common.c')
-rw-r--r--arch/arm/mach-kirkwood/common.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index ab27d06ac4a5..aa36e1bce874 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -87,7 +87,7 @@ static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx)
void __init kirkwood_clk_init(void)
{
struct clk *runit, *ge0, *ge1, *sata0, *sata1, *usb0, *sdio;
- struct clk *crypto, *xor0, *xor1;
+ struct clk *crypto, *xor0, *xor1, *pex0, *pex1;
tclk = clk_register_fixed_rate(NULL, "tclk", NULL,
CLK_IS_ROOT, kirkwood_tclk);
@@ -102,8 +102,8 @@ void __init kirkwood_clk_init(void)
crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO);
xor0 = kirkwood_register_gate("xor0", CGC_BIT_XOR0);
xor1 = kirkwood_register_gate("xor1", CGC_BIT_XOR1);
- kirkwood_register_gate("pex0", CGC_BIT_PEX0);
- kirkwood_register_gate("pex1", CGC_BIT_PEX1);
+ pex0 = kirkwood_register_gate("pex0", CGC_BIT_PEX0);
+ pex1 = kirkwood_register_gate("pex1", CGC_BIT_PEX1);
kirkwood_register_gate("audio", CGC_BIT_AUDIO);
kirkwood_register_gate("tdm", CGC_BIT_TDM);
kirkwood_register_gate("tsu", CGC_BIT_TSU);
@@ -122,6 +122,8 @@ void __init kirkwood_clk_init(void)
orion_clkdev_add(NULL, "mv_crypto", crypto);
orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".0", xor0);
orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".1", xor1);
+ orion_clkdev_add("0", "pcie", pex0);
+ orion_clkdev_add("1", "pcie", pex1);
}
/*****************************************************************************