diff options
author | Richard Cochran <richardcochran@gmail.com> | 2011-09-28 15:16:41 +0200 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2011-09-30 22:18:42 +0200 |
commit | 2b8f0119b857d32f827641a9f7b31fe8d31bfde6 (patch) | |
tree | 08bab78b826d82871bbd70226cf82ee71b9b9228 /arch/arm/mach-ixp4xx/miccpt-pci.c | |
parent | ddf28352b80c86754a6424e3a61e8bdf9213b3c7 (diff) | |
download | linux-2b8f0119b857d32f827641a9f7b31fe8d31bfde6.tar.bz2 |
ixp4xx: support omicron ixp425 based boards
This patch adds board support for the DEVIXP, the MICCPT, and the
MIC256, which are three IXP425 based boards produced by OMICRON
electronics, GmbH.
Signed-off-by: Richard Cochran <richard.cochran@omicron.at>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-ixp4xx/miccpt-pci.c')
-rw-r--r-- | arch/arm/mach-ixp4xx/miccpt-pci.c | 78 |
1 files changed, 78 insertions, 0 deletions
diff --git a/arch/arm/mach-ixp4xx/miccpt-pci.c b/arch/arm/mach-ixp4xx/miccpt-pci.c new file mode 100644 index 000000000000..ca0bae7fca90 --- /dev/null +++ b/arch/arm/mach-ixp4xx/miccpt-pci.c @@ -0,0 +1,78 @@ +/* + * arch/arm/mach-ixp4xx/miccpt-pci.c + * + * MICCPT board-level PCI initialization + * + * Copyright (C) 2002 Intel Corporation. + * Copyright (C) 2003-2004 MontaVista Software, Inc. + * Copyright (C) 2006 OMICRON electronics GmbH + * + * Author: Michael Jochum <michael.jochum@omicron.at> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/kernel.h> +#include <linux/pci.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/irq.h> +#include <asm/mach/pci.h> +#include <asm/irq.h> +#include <mach/hardware.h> +#include <asm/mach-types.h> + +#define MAX_DEV 4 +#define IRQ_LINES 4 + +/* PCI controller GPIO to IRQ pin mappings */ +#define INTA 1 +#define INTB 2 +#define INTC 3 +#define INTD 4 + + +void __init miccpt_pci_preinit(void) +{ + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); + ixp4xx_pci_preinit(); +} + +static int __init miccpt_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) +{ + static int pci_irq_table[IRQ_LINES] = { + IXP4XX_GPIO_IRQ(INTA), + IXP4XX_GPIO_IRQ(INTB), + IXP4XX_GPIO_IRQ(INTC), + IXP4XX_GPIO_IRQ(INTD) + }; + + if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES) + return pci_irq_table[(slot + pin - 2) % 4]; + + return -1; +} + +struct hw_pci miccpt_pci __initdata = { + .nr_controllers = 1, + .preinit = miccpt_pci_preinit, + .swizzle = pci_std_swizzle, + .setup = ixp4xx_setup, + .scan = ixp4xx_scan_bus, + .map_irq = miccpt_map_irq, +}; + +int __init miccpt_pci_init(void) +{ + if (machine_is_miccpt()) + pci_common_init(&miccpt_pci); + return 0; +} + +subsys_initcall(miccpt_pci_init); |