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authorLinus Walleij <linus.walleij@linaro.org>2013-06-15 22:01:13 +0200
committerLinus Walleij <linus.walleij@linaro.org>2013-10-16 14:09:49 +0200
commitd7057e1de8d6c180eb2ecd90b0cab9d1a8a4d8ab (patch)
treef5e2c6f263a1d142de054ab9f9546ad702351e14 /arch/arm/mach-integrator/pci_v3.c
parent50564a794d64ace92c189d7cb5b591a60d3de9c2 (diff)
downloadlinux-d7057e1de8d6c180eb2ecd90b0cab9d1a8a4d8ab.tar.bz2
ARM: integrator: delete non-devicetree boot path
The Device Tree boot path now supports everything the ATAG boot can provide, and the two are equivalent. This deletes the ATAG boot path from the Integrator/AP and Integrator/CP platforms to move them on to the future. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-integrator/pci_v3.c')
-rw-r--r--arch/arm/mach-integrator/pci_v3.c122
1 files changed, 24 insertions, 98 deletions
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index 2d10793fa2a0..67406fc46004 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -809,32 +809,6 @@ static u8 __init pci_v3_swizzle(struct pci_dev *dev, u8 *pinp)
return pci_common_swizzle(dev, pinp);
}
-static int irq_tab[4] __initdata = {
- IRQ_AP_PCIINT0, IRQ_AP_PCIINT1, IRQ_AP_PCIINT2, IRQ_AP_PCIINT3
-};
-
-/*
- * map the specified device/slot/pin to an IRQ. This works out such
- * that slot 9 pin 1 is INT0, pin 2 is INT1, and slot 10 pin 1 is INT1.
- */
-static int __init pci_v3_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- int intnr = ((slot - 9) + (pin - 1)) & 3;
-
- return irq_tab[intnr];
-}
-
-static struct hw_pci pci_v3 __initdata = {
- .swizzle = pci_v3_swizzle,
- .setup = pci_v3_setup,
- .nr_controllers = 1,
- .ops = &pci_v3_ops,
- .preinit = pci_v3_preinit,
- .postinit = pci_v3_postinit,
-};
-
-#ifdef CONFIG_OF
-
static int __init pci_v3_map_irq_dt(const struct pci_dev *dev, u8 slot, u8 pin)
{
struct of_irq oirq;
@@ -851,14 +825,36 @@ static int __init pci_v3_map_irq_dt(const struct pci_dev *dev, u8 slot, u8 pin)
oirq.size);
}
-static int __init pci_v3_dtprobe(struct platform_device *pdev,
- struct device_node *np)
+static struct hw_pci pci_v3 __initdata = {
+ .swizzle = pci_v3_swizzle,
+ .setup = pci_v3_setup,
+ .nr_controllers = 1,
+ .ops = &pci_v3_ops,
+ .preinit = pci_v3_preinit,
+ .postinit = pci_v3_postinit,
+};
+
+static int __init pci_v3_probe(struct platform_device *pdev)
{
+ struct device_node *np = pdev->dev.of_node;
struct of_pci_range_parser parser;
struct of_pci_range range;
struct resource *res;
int irq, ret;
+ /* Remap the Integrator system controller */
+ ap_syscon_base = ioremap(INTEGRATOR_SC_BASE, 0x100);
+ if (!ap_syscon_base) {
+ dev_err(&pdev->dev, "unable to remap the AP syscon for PCIv3\n");
+ return -ENODEV;
+ }
+
+ /* Device tree probe path */
+ if (!np) {
+ dev_err(&pdev->dev, "no device tree node for PCIv3\n");
+ return -ENODEV;
+ }
+
if (of_pci_range_parser_init(&parser, np))
return -EINVAL;
@@ -925,76 +921,6 @@ static int __init pci_v3_dtprobe(struct platform_device *pdev,
return 0;
}
-#else
-
-static inline int pci_v3_dtprobe(struct platform_device *pdev,
- struct device_node *np)
-{
- return -EINVAL;
-}
-
-#endif
-
-static int __init pci_v3_probe(struct platform_device *pdev)
-{
- struct device_node *np = pdev->dev.of_node;
- int ret;
-
- /* Remap the Integrator system controller */
- ap_syscon_base = ioremap(INTEGRATOR_SC_BASE, 0x100);
- if (!ap_syscon_base) {
- dev_err(&pdev->dev, "unable to remap the AP syscon for PCIv3\n");
- return -ENODEV;
- }
-
- /* Device tree probe path */
- if (np)
- return pci_v3_dtprobe(pdev, np);
-
- pci_v3_base = devm_ioremap(&pdev->dev, PHYS_PCI_V3_BASE, SZ_64K);
- if (!pci_v3_base) {
- dev_err(&pdev->dev, "unable to remap PCIv3 base\n");
- return -ENODEV;
- }
-
- ret = devm_request_irq(&pdev->dev, IRQ_AP_V3INT, v3_irq, 0, "V3", NULL);
- if (ret) {
- dev_err(&pdev->dev, "unable to grab PCI error interrupt: %d\n",
- ret);
- return -ENODEV;
- }
-
- conf_mem.name = "PCIv3 config";
- conf_mem.start = PHYS_PCI_CONFIG_BASE;
- conf_mem.end = PHYS_PCI_CONFIG_BASE + SZ_16M - 1;
- conf_mem.flags = IORESOURCE_MEM;
-
- io_mem.name = "PCIv3 I/O";
- io_mem.start = PHYS_PCI_IO_BASE;
- io_mem.end = PHYS_PCI_IO_BASE + SZ_16M - 1;
- io_mem.flags = IORESOURCE_MEM;
-
- non_mem_pci = 0x00000000;
- non_mem_pci_sz = SZ_256M;
- non_mem.name = "PCIv3 non-prefetched mem";
- non_mem.start = PHYS_PCI_MEM_BASE;
- non_mem.end = PHYS_PCI_MEM_BASE + SZ_256M - 1;
- non_mem.flags = IORESOURCE_MEM;
-
- pre_mem_pci = 0x10000000;
- pre_mem_pci_sz = SZ_256M;
- pre_mem.name = "PCIv3 prefetched mem";
- pre_mem.start = PHYS_PCI_PRE_BASE + SZ_256M;
- pre_mem.end = PHYS_PCI_PRE_BASE + SZ_256M - 1;
- pre_mem.flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
-
- pci_v3.map_irq = pci_v3_map_irq;
-
- pci_common_init_dev(&pdev->dev, &pci_v3);
-
- return 0;
-}
-
static const struct of_device_id pci_ids[] = {
{ .compatible = "v3,v360epc-pci", },
{},