diff options
author | Fabio Estevam <festevam@gmail.com> | 2020-09-11 09:40:31 -0300 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2020-09-13 11:15:54 +0800 |
commit | 6c5f05a6cd88c77fd67833e18ac131ad53f86c24 (patch) | |
tree | a976f71cc5465565da3fbdc3d11ab1400cf2f913 /arch/arm/mach-imx | |
parent | a542fc18168cccf6e3091fd52a4543e2ef107a84 (diff) | |
download | linux-6c5f05a6cd88c77fd67833e18ac131ad53f86c24.tar.bz2 |
ARM: imx3: Remove imx3 soc_init()
imx31_soc_init() and imx35_soc_init() were only used by i.MX31/35 board
files. Since the board files users are gone, it is safe to remove
imx3 soc_init() functions.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r-- | arch/arm/mach-imx/common.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-imx/mm-imx3.c | 159 |
2 files changed, 0 insertions, 161 deletions
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 6dd86b99cc68..dafc662959a6 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -28,8 +28,6 @@ void mx21_init_irq(void); void mx31_init_irq(void); void mx35_init_irq(void); void imx21_soc_init(void); -void imx31_soc_init(void); -void imx35_soc_init(void); int mx21_clocks_init(unsigned long lref, unsigned long fref); int mx27_clocks_init(unsigned long fref); int mx31_clocks_init(unsigned long fref); diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index ea2d58a63903..66b477586128 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c @@ -71,40 +71,6 @@ static void __iomem *imx3_ioremap_caller(phys_addr_t phys_addr, size_t size, return __arm_ioremap_caller(phys_addr, size, mtype, caller); } -static void __init imx3_init_l2x0(void) -{ -#ifdef CONFIG_CACHE_L2X0 - void __iomem *l2x0_base; - void __iomem *clkctl_base; - -/* - * First of all, we must repair broken chip settings. There are some - * i.MX35 CPUs in the wild, comming with bogus L2 cache settings. These - * misconfigured CPUs will run amok immediately when the L2 cache gets enabled. - * Workaraound is to setup the correct register setting prior enabling the - * L2 cache. This should not hurt already working CPUs, as they are using the - * same value. - */ -#define L2_MEM_VAL 0x10 - - clkctl_base = ioremap(MX35_CLKCTL_BASE_ADDR, 4096); - if (clkctl_base != NULL) { - writel(0x00000515, clkctl_base + L2_MEM_VAL); - iounmap(clkctl_base); - } else { - pr_err("L2 cache: Cannot fix timing. Trying to continue without\n"); - } - - l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096); - if (!l2x0_base) { - printk(KERN_ERR "remapping L2 cache area failed\n"); - return; - } - - l2x0_init(l2x0_base, 0x00030024, 0x00000000); -#endif -} - #ifdef CONFIG_SOC_IMX31 static struct map_desc mx31_io_desc[] __initdata = { imx_map_entry(MX31, X_MEMC, MT_DEVICE), @@ -145,61 +111,6 @@ void __init mx31_init_irq(void) { mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); } - -static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = { - .per_2_per_addr = 1677, -}; - -static struct sdma_script_start_addrs imx31_to2_sdma_script __initdata = { - .ap_2_ap_addr = 423, - .ap_2_bp_addr = 829, - .bp_2_ap_addr = 1029, -}; - -static struct sdma_platform_data imx31_sdma_pdata __initdata = { - .fw_name = "sdma-imx31-to2.bin", - .script_addrs = &imx31_to2_sdma_script, -}; - -static const struct resource imx31_audmux_res[] __initconst = { - DEFINE_RES_MEM(MX31_AUDMUX_BASE_ADDR, SZ_16K), -}; - -static const struct resource imx31_rnga_res[] __initconst = { - DEFINE_RES_MEM(MX31_RNGA_BASE_ADDR, SZ_16K), -}; - -void __init imx31_soc_init(void) -{ - int to_version = mx31_revision() >> 4; - - imx3_init_l2x0(); - - mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); - mxc_device_init(); - - mxc_register_gpio("imx31-gpio", 0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0); - mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); - mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); - - pinctrl_provide_dummies(); - - if (to_version == 1) { - strncpy(imx31_sdma_pdata.fw_name, "sdma-imx31-to1.bin", - strlen(imx31_sdma_pdata.fw_name)); - imx31_sdma_pdata.script_addrs = &imx31_to1_sdma_script; - } - - imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); - - imx_set_aips(MX31_IO_ADDRESS(MX31_AIPS1_BASE_ADDR)); - imx_set_aips(MX31_IO_ADDRESS(MX31_AIPS2_BASE_ADDR)); - - platform_device_register_simple("imx31-audmux", 0, imx31_audmux_res, - ARRAY_SIZE(imx31_audmux_res)); - platform_device_register_simple("mxc_rnga", -1, imx31_rnga_res, - ARRAY_SIZE(imx31_rnga_res)); -} #endif /* ifdef CONFIG_SOC_IMX31 */ #ifdef CONFIG_SOC_IMX35 @@ -239,74 +150,4 @@ void __init mx35_init_irq(void) { mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); } - -static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = { - .ap_2_ap_addr = 642, - .uart_2_mcu_addr = 817, - .mcu_2_app_addr = 747, - .uartsh_2_mcu_addr = 1183, - .per_2_shp_addr = 1033, - .mcu_2_shp_addr = 961, - .ata_2_mcu_addr = 1333, - .mcu_2_ata_addr = 1252, - .app_2_mcu_addr = 683, - .shp_2_per_addr = 1111, - .shp_2_mcu_addr = 892, -}; - -static struct sdma_script_start_addrs imx35_to2_sdma_script __initdata = { - .ap_2_ap_addr = 729, - .uart_2_mcu_addr = 904, - .per_2_app_addr = 1597, - .mcu_2_app_addr = 834, - .uartsh_2_mcu_addr = 1270, - .per_2_shp_addr = 1120, - .mcu_2_shp_addr = 1048, - .ata_2_mcu_addr = 1429, - .mcu_2_ata_addr = 1339, - .app_2_per_addr = 1531, - .app_2_mcu_addr = 770, - .shp_2_per_addr = 1198, - .shp_2_mcu_addr = 979, -}; - -static struct sdma_platform_data imx35_sdma_pdata __initdata = { - .fw_name = "sdma-imx35-to2.bin", - .script_addrs = &imx35_to2_sdma_script, -}; - -static const struct resource imx35_audmux_res[] __initconst = { - DEFINE_RES_MEM(MX35_AUDMUX_BASE_ADDR, SZ_16K), -}; - -void __init imx35_soc_init(void) -{ - int to_version = mx35_revision() >> 4; - - imx3_init_l2x0(); - - mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); - mxc_device_init(); - - mxc_register_gpio("imx35-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); - mxc_register_gpio("imx35-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); - mxc_register_gpio("imx35-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); - - pinctrl_provide_dummies(); - if (to_version == 1) { - strncpy(imx35_sdma_pdata.fw_name, "sdma-imx35-to1.bin", - strlen(imx35_sdma_pdata.fw_name)); - imx35_sdma_pdata.script_addrs = &imx35_to1_sdma_script; - } - - imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); - - /* Setup AIPS registers */ - imx_set_aips(MX35_IO_ADDRESS(MX35_AIPS1_BASE_ADDR)); - imx_set_aips(MX35_IO_ADDRESS(MX35_AIPS2_BASE_ADDR)); - - /* i.mx35 has the i.mx31 type audmux */ - platform_device_register_simple("imx31-audmux", 0, imx35_audmux_res, - ARRAY_SIZE(imx35_audmux_res)); -} #endif /* ifdef CONFIG_SOC_IMX35 */ |