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authorHans Ulli Kroll <ulli.kroll@googlemail.com>2015-08-11 22:09:05 +0200
committerOlof Johansson <olof@lixom.net>2015-08-13 11:41:52 +0200
commitd330615b90d4997909806f8c22be6a3a2c3449b9 (patch)
treeb31a79b6348b4e6f48375be9e2e20929e08de35c /arch/arm/mach-gemini
parent5dc90739888e741985036994e2e5700c6dc9d118 (diff)
downloadlinux-d330615b90d4997909806f8c22be6a3a2c3449b9.tar.bz2
ARM: gemini: Setup timer3 as free running timer
In the original driver it is missed to setup a free running driver. This timer is needed for the scheduler. So setup it. Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-gemini')
-rw-r--r--arch/arm/mach-gemini/time.c21
1 files changed, 20 insertions, 1 deletions
diff --git a/arch/arm/mach-gemini/time.c b/arch/arm/mach-gemini/time.c
index 5e2b1bab4462..f5f18df5aacd 100644
--- a/arch/arm/mach-gemini/time.c
+++ b/arch/arm/mach-gemini/time.c
@@ -15,6 +15,7 @@
#include <asm/mach/time.h>
#include <linux/clockchips.h>
#include <linux/clocksource.h>
+#include <linux/sched_clock.h>
/*
* Register definitions for the timers
@@ -62,6 +63,11 @@
static unsigned int tick_rate;
+static u64 notrace gemini_read_sched_clock(void)
+{
+ return readl(TIMER_COUNT(TIMER3_BASE));
+}
+
static int gemini_timer_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
{
@@ -206,8 +212,21 @@ void __init gemini_timer_init(void)
writel(TIMER_DEFAULT_FLAGS, TIMER_CR);
/*
- * Setup clockevent timer (interrupt-driven.)
+ * Setup free-running clocksource timer (interrupts
+ * disabled.)
*/
+ writel(0, TIMER_COUNT(TIMER3_BASE));
+ writel(0, TIMER_LOAD(TIMER3_BASE));
+ writel(0, TIMER_MATCH1(TIMER3_BASE));
+ writel(0, TIMER_MATCH2(TIMER3_BASE));
+ clocksource_mmio_init(TIMER_COUNT(TIMER3_BASE),
+ "gemini_clocksource", tick_rate,
+ 300, 32, clocksource_mmio_readl_up);
+ sched_clock_register(gemini_read_sched_clock, 32, tick_rate);
+
+ /*
+ * Setup clockevent timer (interrupt-driven.)
+ */
writel(0, TIMER_COUNT(TIMER1_BASE));
writel(0, TIMER_LOAD(TIMER1_BASE));
writel(0, TIMER_MATCH1(TIMER1_BASE));