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author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-03-15 14:32:59 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-03-15 14:32:59 -0700 |
commit | e8a71a38668919c53e6ca9dd1bfa977e5690523f (patch) | |
tree | e04a7b81eb8d6a2d0f03f45dfbbf0d8378ce874c /arch/arm/mach-exynos | |
parent | 2b9c272cf5cd81708e51b4ce3e432ce9566cfa47 (diff) | |
parent | ebb09b33c60c46fd4f7ffa0af9e693eebe765d1b (diff) | |
download | linux-e8a71a38668919c53e6ca9dd1bfa977e5690523f.tar.bz2 |
Merge tag 'ntb-5.1' of git://github.com/jonmason/ntb
Pull NTB updates from Jon Mason:
- fixes for switchtec debugability and mapping table entries
- NTB transport improvements
- a reworking of the peer_db_addr for better abstraction
* tag 'ntb-5.1' of git://github.com/jonmason/ntb:
NTB: add new parameter to peer_db_addr() db_bit and db_data
NTB: ntb_transport: Ensure the destination buffer is mapped for TX DMA
NTB: ntb_transport: Free MWs in ntb_transport_link_cleanup()
ntb_hw_switchtec: Added support of >=4G memory windows
ntb_hw_switchtec: NT req id mapping table register entry number should be 512
ntb_hw_switchtec: debug print 64bit aligned crosslink BAR Numbers
Diffstat (limited to 'arch/arm/mach-exynos')
0 files changed, 0 insertions, 0 deletions