diff options
author | Cyril Chemparathy <cyril@ti.com> | 2010-05-07 17:06:37 -0400 |
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committer | Kevin Hilman <khilman@deeprootsystems.com> | 2010-05-13 10:05:28 -0700 |
commit | bd808947040ba53b2b0e52dde598a9414fb27bba (patch) | |
tree | 868535ab01e9a7a754d255c77b2ab839f8b4f3ca /arch/arm/mach-davinci/irq.c | |
parent | e4c822c7e98cdda78b10a696b030fc20b22dcab4 (diff) | |
download | linux-bd808947040ba53b2b0e52dde598a9414fb27bba.tar.bz2 |
Davinci: aintc/cpintc - use ioremap()
This patch implements the following:
- interrupt initialization uses ioremap() instead of passing a virtual address
via davinci_soc_info.
- machine definitions directly point to cp_intc_init() or davinci_irq_init()
- davinci_intc_type and davinci_intc_base now get initialized in controller
specific init functions instead of davinci_common_init()
- minor fix in davinci_irq_init() to use intc_irq_num instead of
DAVINCI_N_AINTC_IRQ
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/irq.c')
-rw-r--r-- | arch/arm/mach-davinci/irq.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c index af92ffee8471..784ddf3c5ad4 100644 --- a/arch/arm/mach-davinci/irq.c +++ b/arch/arm/mach-davinci/irq.c @@ -116,6 +116,11 @@ void __init davinci_irq_init(void) unsigned i; const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios; + davinci_intc_type = DAVINCI_INTC_TYPE_AINTC; + davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_4K); + if (WARN_ON(!davinci_intc_base)) + return; + /* Clear all interrupt requests */ davinci_irq_writel(~0x0, FIQ_REG0_OFFSET); davinci_irq_writel(~0x0, FIQ_REG1_OFFSET); @@ -148,7 +153,7 @@ void __init davinci_irq_init(void) } /* set up genirq dispatch for ARM INTC */ - for (i = 0; i < DAVINCI_N_AINTC_IRQ; i++) { + for (i = 0; i < davinci_soc_info.intc_irq_num; i++) { set_irq_chip(i, &davinci_irq_chip_0); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); if (i != IRQ_TINT1_TINT34) |