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authorRobert Tivy <rtivy@ti.com>2013-01-10 16:23:23 -0800
committerSekhar Nori <nsekhar@ti.com>2013-01-22 17:42:59 +0530
commitaf47e6bb8866ad57cfcfeceecf799edc3a658660 (patch)
treef91c474cdd8988e9a959b66f0d6c22032f2ffe71 /arch/arm/mach-davinci/include
parent35031f9df569913ac0c46b03c8033fc1deed749d (diff)
downloadlinux-af47e6bb8866ad57cfcfeceecf799edc3a658660.tar.bz2
ARM: davinci: psc: introduce reset API
Introduce an IP reset API for use on DaVinci SoC. There is no existing "reset" framework support for SoC devices. The remoteproc driver needs explicit control of the DSP's reset line. To support this, a new DaVinci specific API is added. This private API will disappear with DT migration. Some discussion regarding a proposed DT "reset" binding is here: https://patchwork.kernel.org/patch/1635051/ Modify davinci_clk_init() to set clk "reset" function for clocks that indicate PSC_LRST support. Also fix indentation issue with function opening curly brace. Signed-off-by: Robert Tivy <rtivy@ti.com> [nsekhar@ti.com: rename davinci_psc_config_reset() to davinci_psc_reset()] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'arch/arm/mach-davinci/include')
-rw-r--r--arch/arm/mach-davinci/include/mach/clock.h3
-rw-r--r--arch/arm/mach-davinci/include/mach/psc.h3
2 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/include/mach/clock.h b/arch/arm/mach-davinci/include/mach/clock.h
index a3b040219876..3e8af6a0b64c 100644
--- a/arch/arm/mach-davinci/include/mach/clock.h
+++ b/arch/arm/mach-davinci/include/mach/clock.h
@@ -18,4 +18,7 @@ struct clk;
extern int clk_register(struct clk *clk);
extern void clk_unregister(struct clk *clk);
+int davinci_clk_reset_assert(struct clk *c);
+int davinci_clk_reset_deassert(struct clk *c);
+
#endif
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 40a0027838e8..0a22710493fd 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -246,6 +246,7 @@
#define MDSTAT_STATE_MASK 0x3f
#define PDSTAT_STATE_MASK 0x1f
+#define MDCTL_LRST BIT(8)
#define MDCTL_FORCE BIT(31)
#define PDCTL_NEXT BIT(0)
#define PDCTL_EPCGOOD BIT(8)
@@ -253,6 +254,8 @@
#ifndef __ASSEMBLER__
extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id);
+extern void davinci_psc_reset(unsigned int ctlr, unsigned int id,
+ bool reset);
extern void davinci_psc_config(unsigned int domain, unsigned int ctlr,
unsigned int id, bool enable, u32 flags);