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| author | Thomas Gleixner <tglx@linutronix.de> | 2019-03-21 12:30:54 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2019-03-21 12:30:54 +0100 |
| commit | 3ce8461f45a7486b286afa2ae5619ce6aed8b6db (patch) | |
| tree | cc445fa3aed0f434bde55320080d8e4969066a5d /arch/arm/mach-cns3xxx | |
| parent | 551417af91b163bd697eb50b3601adae2177c28a (diff) | |
| parent | fca269f201a8d9985c0a31fb60b15d4eb57cef80 (diff) | |
| download | linux-3ce8461f45a7486b286afa2ae5619ce6aed8b6db.tar.bz2 | |
Merge tag 'irqchip-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Pull irqchip updates for 5.1 from Marc Zyngier:
- irqsteer error handling fix
- GICv3 range coalescing fix
- stm32 coprocessor coexistence fixes
- mbigen MSI teardown fix
- non-DT secondary GIC infrastructure removed
- various cleanups (brcmstb-l2, mmp)
- new DT bindings (r8a774c0)
Diffstat (limited to 'arch/arm/mach-cns3xxx')
| -rw-r--r-- | arch/arm/mach-cns3xxx/core.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index 7d5a44a06648..f676592d8402 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c @@ -90,7 +90,7 @@ void __init cns3xxx_map_io(void) /* used by entry-macro.S */ void __init cns3xxx_init_irq(void) { - gic_init(0, 29, IOMEM(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), + gic_init(IOMEM(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), IOMEM(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT)); } |