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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2012-09-10 15:07:26 +0530
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2012-09-25 11:20:26 +0100
commit6323fa2256baa73d6a960ee57ec086b66aeecd0b (patch)
tree49d00ad033947b3723e081dafc97608904b73728 /arch/arm/kernel
parente6b866e954a7f0d0144a951c158f3922dac1e6b9 (diff)
downloadlinux-6323fa2256baa73d6a960ee57ec086b66aeecd0b.tar.bz2
ARM: mm: update __v7_setup() to the new LoUIS cache maintenance API
The ARMv7 processor setup function __v7_setup() cleans and invalidates the CPU cache before enabling MMU to start the CPU with a clean CPU local cache. But on ARMv7 architectures like Cortex-[A15/A8], this code will end up flushing the L2 caches(up to level of Coherency) which is undesirable and expensive. The setup functions are used in the CPU hotplug scenario too and hence flushing all cache levels should be avoided. This patch replaces the cache flushing call with the newly introduced v7 dcache LoUIS API where only cache levels up to LoUIS are cleaned and invalidated when a processors executes __v7_setup which is the expected behavior. For processors like A9 and A5 where the L2 cache is an outer one the behavior should be unchanged. Reviewed-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by: Shawn Guo <shawn.guo@linaro.org>
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