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| author | Linus Walleij <linus.walleij@linaro.org> | 2020-08-27 23:28:56 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@armlinux.org.uk> | 2020-09-15 14:35:28 +0100 |
| commit | 4df24fef09615d8f7dd2120f5072486addfd3eb9 (patch) | |
| tree | 83a392d879ccb5dc6556ce3e6595b43b38dba597 /arch/arm/include | |
| parent | 2c50a570e9dc649c182268e779dffe0712e98a6a (diff) | |
| download | linux-4df24fef09615d8f7dd2120f5072486addfd3eb9.tar.bz2 | |
ARM: 9005/1: debug: Select flow control for all debug UARTs
Instead of a flow control selection mechanism specifically for
8250, make this available for all debug UARTs. If the debug
UART supports waiting for CTS to be asserted, then this code
can be activated for terminals that need it.
We keep the defaults for EBSA110, Footbridge, Gemini and RPC
so that this still works as expected for these older platforms:
they assume that flow control shall be enabled for debug
prints.
I switch the location of the check for
ifdef CONFIG_DEBUG_UART_FLOW_CONTROL from the actual debug
UART drivers: the code would get compiled-out for 8250 and
Tegra unless their custom config (or passing -DFLOW_CONTROL
in the Tegra case) was not set. Instead this is conditional
at the three places where we print debug messages. The idea
is that debug UARTs can be implemented without this ifdef
boilerplate so they look cleaner, alas the ifdef has to be
somewhere.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/debug/8250.S | 2 | ||||
| -rw-r--r-- | arch/arm/include/debug/tegra.S | 2 |
2 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/include/debug/8250.S b/arch/arm/include/debug/8250.S index 769246d87fff..e3692a37cede 100644 --- a/arch/arm/include/debug/8250.S +++ b/arch/arm/include/debug/8250.S @@ -49,9 +49,7 @@ .endm .macro waituartcts,rd,rx -#ifdef CONFIG_DEBUG_UART_8250_FLOW_CONTROL 1001: load \rd, [\rx, #UART_MSR << UART_SHIFT] tst \rd, #UART_MSR_CTS beq 1001b -#endif .endm diff --git a/arch/arm/include/debug/tegra.S b/arch/arm/include/debug/tegra.S index 2bca6358cdd0..98daa7f48314 100644 --- a/arch/arm/include/debug/tegra.S +++ b/arch/arm/include/debug/tegra.S @@ -179,14 +179,12 @@ .endm .macro waituartcts, rd, rx -#ifdef FLOW_CONTROL cmp \rx, #0 beq 1002f 1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT] tst \rd, #UART_MSR_CTS beq 1001b 1002: -#endif .endm .macro waituarttxrdy,rd,rx |