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| author | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2011-06-28 12:42:56 -0700 |
|---|---|---|
| committer | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2011-09-23 12:05:30 +0530 |
| commit | 8fb54284ba6aa1f0d832ec015fde64ecf4bb0f4f (patch) | |
| tree | 1c9a5d9f0c57af407085f2d74ef8c3bd63ecb34e /arch/arm/include/asm/mach | |
| parent | 48af9feab5e3bdf21af3a929ecc7c0b79d9a4a4e (diff) | |
| download | linux-8fb54284ba6aa1f0d832ec015fde64ecf4bb0f4f.tar.bz2 | |
ARM: mm: Add strongly ordered descriptor support.
On certain architectures, there might be a need to mark certain
addresses with strongly ordered memory attributes to avoid ordering
issues at the interconnect level.
On OMAP4, the asynchronous bridge buffers can only be drained
with strongly ordered accesses and hence the need to mark the
memory strongly ordered.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Woodruff Richard <r-woodruff2@ti.com>
Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
Diffstat (limited to 'arch/arm/include/asm/mach')
| -rw-r--r-- | arch/arm/include/asm/mach/map.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h index d2fedb5aeb1f..b36f3654bf54 100644 --- a/arch/arm/include/asm/mach/map.h +++ b/arch/arm/include/asm/mach/map.h @@ -29,6 +29,7 @@ struct map_desc { #define MT_MEMORY_NONCACHED 11 #define MT_MEMORY_DTCM 12 #define MT_MEMORY_ITCM 13 +#define MT_MEMORY_SO 14 #ifdef CONFIG_MMU extern void iotable_init(struct map_desc *, int); |