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authorRussell King <rmk+kernel@armlinux.org.uk>2016-09-06 14:21:46 +0100
committerRussell King <rmk+kernel@armlinux.org.uk>2016-09-12 11:04:04 +0100
commit7c0091eceab231b59e51b80bbcf5a2205a0fa905 (patch)
tree088f386ebf1189c267db73547b7204aff5d7eebf /arch/arm/common
parentcb034407ec3f816540f359300cda1122faabdbbd (diff)
downloadlinux-7c0091eceab231b59e51b80bbcf5a2205a0fa905.tar.bz2
ARM: sa1111: fix pcmcia interrupt mask polarity
The polarity of the high IRQs was being calculated using SA1111_IRQMASK_HI(), but this assumes a Linux interrupt number, not a hardware interrupt number. Hence, the resulting mask was incorrect. Fix this. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'arch/arm/common')
-rw-r--r--arch/arm/common/sa1111.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index 332b92317fd8..cfa61b857cad 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -472,8 +472,8 @@ static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base)
* specifies that S0ReadyInt and S1ReadyInt should be '1'.
*/
sa1111_writel(0, irqbase + SA1111_INTPOL0);
- sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) |
- SA1111_IRQMASK_HI(IRQ_S1_READY_NINT),
+ sa1111_writel(BIT(IRQ_S0_READY_NINT & 31) |
+ BIT(IRQ_S1_READY_NINT & 31),
irqbase + SA1111_INTPOL1);
/* clear all IRQs */