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author | Tony Lindgren <tony@atomide.com> | 2017-12-23 08:18:15 -0800 |
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committer | Tony Lindgren <tony@atomide.com> | 2017-12-23 08:18:15 -0800 |
commit | 1cadb0c341079785182a8d00d12ecb0bbef935fb (patch) | |
tree | 08af25c90c9800560e3d859a0add0ae08a157e68 /arch/arm/boot | |
parent | 956979a9382eba1530ffe9d06496924724dd591d (diff) | |
download | linux-1cadb0c341079785182a8d00d12ecb0bbef935fb.tar.bz2 |
Revert "ARM: dts: dra7: Add properties to enable PCIe x2 lane mode"
This reverts commit 4ece93c020e3ee19767b1c111be39fe7e32f8bf2.
The device tree binding for these is still being discussed.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/dra7.dtsi | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index c4d1fffea8ba..c13848e07cb4 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -320,8 +320,6 @@ ti,hwmods = "pcie1"; phys = <&pcie1_phy>; phy-names = "pcie-phy0"; - ti,syscon-lane-conf = <&scm_conf 0x558>; - ti,syscon-lane-sel = <&scm_conf_pcie 0x18>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &pcie1_intc 1>, <0 0 0 2 &pcie1_intc 2>, @@ -346,8 +344,6 @@ phys = <&pcie1_phy>; phy-names = "pcie-phy0"; ti,syscon-unaligned-access = <&scm_conf1 0x14 2>; - ti,syscon-lane-conf = <&scm_conf 0x558>; - ti,syscon-lane-sel = <&scm_conf_pcie 0x18>; status = "disabled"; }; }; |