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author | Linus Walleij <linus.walleij@linaro.org> | 2020-09-04 09:08:26 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@armlinux.org.uk> | 2020-09-15 14:35:32 +0100 |
commit | c03e41470e90112328e5a3dcc6961a07e87b8141 (patch) | |
tree | 72e9359bf0c7b0f51284b2a9ab82c86921ee1c0a /arch/arm/boot | |
parent | 2596a72d338481b49a678ab880338fd5a661e663 (diff) | |
download | linux-c03e41470e90112328e5a3dcc6961a07e87b8141.tar.bz2 |
ARM: 9010/1: uncompress: Print the location of appended DTB
When using the kernel with an appended DTB it is useful to
know where this will end up in the physical memory at the
time the kernel boots.
We add a debug print macro that will help out with this.
Here is a sample debug print after passing -DDEBUG to head.S
during compilation:
DTB:0x40CEBA70 (0x000051B5)
C:0x402080C0-0x40CF0CE0->0x41801D00-0x422EA920
DTB:0x422E56B0 (0x00005262)
This means that the appended DTB is first found after the
compressed kernel at 0x40CEBA70 of size 0x51B5 and then
after the compressed kernel is moved to 0x41801D00
it is found again at 0x422E56B0 and is there size 0x5262.
The growth in size of the FDT is due to the call to
atags_to_fdt() that augments the DTB with ATAG information.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/compressed/head.S | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index ce9e9e989fc6..84a6d828e6d6 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -113,6 +113,28 @@ #endif .endm + /* + * Debug print of the final appended DTB location + */ + .macro dbgadtb, begin, end +#ifdef DEBUG + kputc #'D' + kputc #'T' + kputc #'B' + kputc #':' + kputc #'0' + kputc #'x' + kphex \begin, 8 /* Start of appended DTB */ + kputc #' ' + kputc #'(' + kputc #'0' + kputc #'x' + kphex \end, 8 /* End of appended DTB */ + kputc #')' + kputc #'\n' +#endif + .endm + .macro enable_cp15_barriers, reg mrc p15, 0, \reg, c1, c0, 0 @ read SCTLR tst \reg, #(1 << 5) @ CP15BEN bit set? @@ -330,6 +352,7 @@ restart: adr r0, LC1 mov r5, r5, ror #8 eor r5, r5, r1, lsr #8 #endif + dbgadtb r6, r5 /* 50% DTB growth should be good enough */ add r5, r5, r5, lsr #1 /* preserve 64-bit alignment */ |