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authorThierry Reding <treding@nvidia.com>2015-01-08 13:24:33 +0100
committerThierry Reding <treding@nvidia.com>2015-01-09 11:45:15 +0100
commit2cda1880f8c6b6a081ab78824d3742a229887b69 (patch)
tree91c638cbd3bf58518453fbcfb8fc3d281892a3f6 /arch/arm/boot/dts
parentde47699d005996b41cea590c6098078ac12058be (diff)
downloadlinux-2cda1880f8c6b6a081ab78824d3742a229887b69.tar.bz2
ARM: tegra: Fix unit address for Cortex-A9 TWD timer
The Cortex-A9 TWD timer has registers at address 0x50040600, but the unit address was 50004600, most likely a typo. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi2
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index f76fe94267d6..e5527f742696 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -140,7 +140,7 @@
};
};
- timer@50004600 {
+ timer@50040600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x50040600 0x20>;
interrupts = <GIC_PPI 13
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 99475f6e76a3..db4810df142c 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -225,7 +225,7 @@
};
};
- timer@50004600 {
+ timer@50040600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x50040600 0x20>;
interrupts = <GIC_PPI 13