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authorArnd Bergmann <arnd@arndb.de>2014-04-25 11:22:20 +0200
committerArnd Bergmann <arnd@arndb.de>2014-04-25 11:22:20 +0200
commit76e7745e8e4330fdb30f049303d524261c0b7a2c (patch)
tree648153b454922b722030944a8c845152499ae955 /arch/arm/boot/dts/zynq-zc706.dts
parent1fc52762e33cc905331681364d79424d921f60f2 (diff)
parent0f6faa3fc909482c2b40161de9bcf0d5460e54c5 (diff)
downloadlinux-76e7745e8e4330fdb30f049303d524261c0b7a2c.tar.bz2
Merge tag 'zynq-dt-fixes-for-3.15' of git://git.xilinx.com/linux-xlnx into fixes
arm: Xilinx Zynq DT fixes for v3.15 - Enable Zynq I2c - Fix cpufreq DT binding * tag 'zynq-dt-fixes-for-3.15' of git://git.xilinx.com/linux-xlnx: ARM: zynq: dt: Add I2C nodes to Zynq device tree ARM: zynq: DT: Add 'clock-latency' property Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/zynq-zc706.dts')
-rw-r--r--arch/arm/boot/dts/zynq-zc706.dts68
1 files changed, 68 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts
index 88f62c50382e..4cc9913078cd 100644
--- a/arch/arm/boot/dts/zynq-zc706.dts
+++ b/arch/arm/boot/dts/zynq-zc706.dts
@@ -35,6 +35,74 @@
phy-mode = "rgmii";
};
+&i2c0 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ i2cswitch@74 {
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x74>;
+
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ si570: clock-generator@5d {
+ #clock-cells = <0>;
+ compatible = "silabs,si570";
+ temperature-stability = <50>;
+ reg = <0x5d>;
+ factory-fout = <156250000>;
+ clock-frequency = <148500000>;
+ };
+ };
+
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ eeprom@54 {
+ compatible = "at,24c08";
+ reg = <0x54>;
+ };
+ };
+
+ i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ gpio@21 {
+ compatible = "ti,tca6416";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ i2c@4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <4>;
+ rtc@51 {
+ compatible = "nxp,pcf8563";
+ reg = <0x51>;
+ };
+ };
+
+ i2c@7 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <7>;
+ ucd90120@65 {
+ compatible = "ti,ucd90120";
+ reg = <0x65>;
+ };
+ };
+ };
+};
+
&sdhci0 {
status = "okay";
};