diff options
| author | Kaixu Xia <xiakaixu@huawei.com> | 2015-03-30 14:13:39 -0600 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-04-03 16:17:03 +0200 |
| commit | 223437c72ae008094e43199dea93c3a144c4e153 (patch) | |
| tree | a995f97376f17e00f743f02f6e1aa8328864ad4a /arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | |
| parent | a0a500efab41c761a1d1fd919d2e42a3a3545b2e (diff) | |
| download | linux-223437c72ae008094e43199dea93c3a144c4e153.tar.bz2 | |
coresight: remove the unnecessary configuration coresight-default-sink
The coresight-default-sink configuration option has been
removed from the framework. As such remove it from DT and bindings.
Signed-off-by: Kaixu Xia <xiakaixu@huawei.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts')
| -rw-r--r-- | arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts index 33920df03640..7a2aeacd62c0 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts @@ -362,7 +362,6 @@ compatible = "arm,coresight-etb10", "arm,primecell"; reg = <0 0x20010000 0 0x1000>; - coresight-default-sink; clocks = <&oscclk6a>; clock-names = "apb_pclk"; port { |