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| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2018-08-16 10:06:03 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2018-09-26 16:42:42 +0200 |
| commit | 8188391c127ea34d66f37eda6755d0acb51dc600 (patch) | |
| tree | 8107966bd6568604aeec32ebeeff6825b378d243 /arch/arm/boot/dts/tegra20.dtsi | |
| parent | 564706f65cda3de52b09e51feb423a43940fe661 (diff) | |
| download | linux-8188391c127ea34d66f37eda6755d0acb51dc600.tar.bz2 | |
ARM: dts: tegra20: restore address order
Commit 6c468f109884 ("ARM: dts: tegra: add Tegra20 NAND flash
controller node") introduced the nand-controller node. However, it got
added at the wrong spot not honoring the address order. Fix this.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/tegra20.dtsi | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 15b73bd377f0..80854f7de765 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -419,19 +419,6 @@ status = "disabled"; }; - gmi@70009000 { - compatible = "nvidia,tegra20-gmi"; - reg = <0x70009000 0x1000>; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0xd0000000 0xfffffff>; - clocks = <&tegra_car TEGRA20_CLK_NOR>; - clock-names = "gmi"; - resets = <&tegra_car 42>; - reset-names = "gmi"; - status = "disabled"; - }; - nand-controller@70008000 { compatible = "nvidia,tegra20-nand"; reg = <0x70008000 0x100>; @@ -447,6 +434,19 @@ status = "disabled"; }; + gmi@70009000 { + compatible = "nvidia,tegra20-gmi"; + reg = <0x70009000 0x1000>; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0xd0000000 0xfffffff>; + clocks = <&tegra_car TEGRA20_CLK_NOR>; + clock-names = "gmi"; + resets = <&tegra_car 42>; + reset-names = "gmi"; + status = "disabled"; + }; + pwm: pwm@7000a000 { compatible = "nvidia,tegra20-pwm"; reg = <0x7000a000 0x100>; |