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author | Krzysztof Kozlowski <krzk@kernel.org> | 2018-07-09 18:05:19 +0200 |
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committer | Thierry Reding <treding@nvidia.com> | 2018-07-09 18:50:53 +0200 |
commit | 8ab11f8068ef57e5763e1cc91b3dfe23a2482e68 (patch) | |
tree | d77fd31acfe4e2e90bed59c28e964911017cf4ce /arch/arm/boot/dts/tegra20-colibri-iris.dts | |
parent | 35a21229f8e0b461b1db7ab96a4ef390b42b13d2 (diff) | |
download | linux-8ab11f8068ef57e5763e1cc91b3dfe23a2482e68.tar.bz2 |
ARM: tegra: Work safely with 256 MB Colibri-T20 modules
Colibri-T20 can come in 256 MB RAM (with 512 MB NAND) or 512 MB RAM
(with 1024 MB NAND) flavors. Both of them will use the same DTSI
expecting the bootloader to do the fixup of /memory node. However in
case it does not happen, let's stay on safe side by limiting the memory
to 256 MB for both versions of Colibri-T20.
Rename to remove the unnecessary memory size from the device tree file
name. While at it, also follow the typical Toradex SoC, module, carrier
board hierarchy.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-colibri-iris.dts')
-rw-r--r-- | arch/arm/boot/dts/tegra20-colibri-iris.dts | 106 |
1 files changed, 106 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts new file mode 100644 index 000000000000..57f16c0e9917 --- /dev/null +++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra20-colibri.dtsi" + +/ { + model = "Toradex Colibri T20 256/512 MB on Iris"; + compatible = "toradex,iris", "toradex,colibri_t20-512", "nvidia,tegra20"; + + aliases { + serial0 = &uarta; + serial1 = &uartd; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + host1x@50000000 { + hdmi@54280000 { + status = "okay"; + }; + }; + + pinmux@70000014 { + state_default: pinmux { + hdint { + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + + i2cddc { + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + + sdio4 { + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + + uarta { + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + + uartd { + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + }; + }; + + serial@70006000 { + status = "okay"; + }; + + serial@70006300 { + status = "okay"; + }; + + i2c_ddc: i2c@7000c400 { + status = "okay"; + }; + + usb@c5000000 { + status = "okay"; + }; + + usb-phy@c5000000 { + status = "okay"; + }; + + usb@c5008000 { + status = "okay"; + }; + + usb-phy@c5008000 { + status = "okay"; + }; + + sdhci@c8000600 { + status = "okay"; + bus-width = <4>; + vmmc-supply = <&vcc_sd_reg>; + vqmmc-supply = <&vcc_sd_reg>; + }; + + regulators { + regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "usb_host_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + regulator-always-on; + gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; + }; + + vcc_sd_reg: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "vcc_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + }; +}; |