diff options
author | Lee Jones <lee.jones@linaro.org> | 2016-06-07 13:19:00 +0200 |
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committer | Patrice Chotard <patrice.chotard@st.com> | 2016-07-12 13:22:51 +0200 |
commit | f221d8100e366e8373096ba7ffc36cf42d504e82 (patch) | |
tree | 697ffd92c8c561cf7e77d4b6bf39c8d3a20a2a72 /arch/arm/boot/dts/stih410-clock.dtsi | |
parent | 6cb4f8dd1044849047023b76567231f41eb64c9e (diff) | |
download | linux-f221d8100e366e8373096ba7ffc36cf42d504e82.tar.bz2 |
ARM: sti: stih410-clocks: Identify critical clocks
Lots of platforms contain clocks which if turned off would prove fatal.
The only way to recover is to restart the board(s). This driver takes
references to clocks which are required to be always-on. The Common
Clk Framework will then take references to them. This way they will
not be turned off during the clk_disabled_unused() procedure.
In this patch we are identifying clocks, which if gated would render
the STiH410 development board unserviceable.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/stih410-clock.dtsi')
-rw-r--r-- | arch/arm/boot/dts/stih410-clock.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih410-clock.dtsi b/arch/arm/boot/dts/stih410-clock.dtsi index d1f2acafc9b6..fd5049682181 100644 --- a/arch/arm/boot/dts/stih410-clock.dtsi +++ b/arch/arm/boot/dts/stih410-clock.dtsi @@ -103,6 +103,7 @@ clocks = <&clk_sysin>; clock-output-names = "clk-s-a0-pll-ofd-0"; + clock-critical = <0>; /* clk-s-a0-pll-ofd-0 */ }; clk_s_a0_flexgen: clk-s-a0-flexgen { @@ -115,6 +116,7 @@ clock-output-names = "clk-ic-lmi0", "clk-ic-lmi1"; + clock-critical = <CLK_IC_LMI0>; }; }; @@ -129,6 +131,7 @@ "clk-s-c0-fs0-ch1", "clk-s-c0-fs0-ch2", "clk-s-c0-fs0-ch3"; + clock-critical = <0>; /* clk-s-c0-fs0-ch0 */ }; clk_s_c0: clockgen-c@09103000 { @@ -142,6 +145,7 @@ clocks = <&clk_sysin>; clock-output-names = "clk-s-c0-pll0-odf-0"; + clock-critical = <0>; /* clk-s-c0-pll0-odf-0 */ }; clk_s_c0_pll1: clk-s-c0-pll1 { @@ -204,6 +208,11 @@ "clk-clust-hades", "clk-hwpe-hades", "clk-fc-hades"; + clock-critical = <CLK_ICN_CPU>, + <CLK_TX_ICN_DMU>, + <CLK_EXT2F_A9>, + <CLK_ICN_LMI>, + <CLK_ICN_SBC>; }; }; |