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authorTim Sander <tim.sander@hbm.com>2018-01-16 11:39:59 -0600
committerDinh Nguyen <dinguyen@kernel.org>2018-01-23 09:37:22 -0600
commit2fd372084e1eecb63829bb0959889c0fdbb74796 (patch)
tree9bf0d33050c136780350ec8fa86fe35202c3bd4c /arch/arm/boot/dts/socfpga.dtsi
parent33af8ca0fd09514aa6a5600ae2aa455a30de5f43 (diff)
downloadlinux-2fd372084e1eecb63829bb0959889c0fdbb74796.tar.bz2
ARM: dts: socfpga: add i2c reset signals
Add the reset signals for the i2c controllers on Cyclone5-based SoCFPGA boards to the dtsi. Signed-off-by: Tim Sander <tim.sander@hbm.com> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/socfpga.dtsi')
-rw-r--r--arch/arm/boot/dts/socfpga.dtsi4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 7e24dc8e82d4..c42ca7022e8c 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -651,6 +651,7 @@
#size-cells = <0>;
compatible = "snps,designware-i2c";
reg = <0xffc04000 0x1000>;
+ resets = <&rst I2C0_RESET>;
clocks = <&l4_sp_clk>;
interrupts = <0 158 0x4>;
status = "disabled";
@@ -661,6 +662,7 @@
#size-cells = <0>;
compatible = "snps,designware-i2c";
reg = <0xffc05000 0x1000>;
+ resets = <&rst I2C1_RESET>;
clocks = <&l4_sp_clk>;
interrupts = <0 159 0x4>;
status = "disabled";
@@ -671,6 +673,7 @@
#size-cells = <0>;
compatible = "snps,designware-i2c";
reg = <0xffc06000 0x1000>;
+ resets = <&rst I2C2_RESET>;
clocks = <&l4_sp_clk>;
interrupts = <0 160 0x4>;
status = "disabled";
@@ -681,6 +684,7 @@
#size-cells = <0>;
compatible = "snps,designware-i2c";
reg = <0xffc07000 0x1000>;
+ resets = <&rst I2C3_RESET>;
clocks = <&l4_sp_clk>;
interrupts = <0 161 0x4>;
status = "disabled";