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author | Heiko Stuebner <heiko@sntech.de> | 2018-11-18 20:03:02 +0100 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2018-11-19 09:28:17 +0100 |
commit | 672e60b72bbe7aace88721db55b380b6a51fb8f9 (patch) | |
tree | 8e1dcc8a74e644b50d8b332fe4baad554002d4c4 /arch/arm/boot/dts/rk3288-veyron.dtsi | |
parent | 651022382c7f8da46cb4872a545ee1da6d097d2a (diff) | |
download | linux-672e60b72bbe7aace88721db55b380b6a51fb8f9.tar.bz2 |
ARM: dts: rockchip: Remove @0 from the veyron memory node
The Coreboot version on veyron ChromeOS devices seems to ignore
memory@0 nodes when updating the available memory and instead
inserts another memory node without the address.
This leads to 4GB systems only ever be using 2GB as the memory@0
node takes precedence. So remove the @0 for veyron devices.
Fixes: 0b639b815f15 ("ARM: dts: rockchip: Add missing unit name to memory nodes in rk3288 boards")
Cc: stable@vger.kernel.org
Reported-by: Heikki Lindholm <holin@iki.fi>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288-veyron.dtsi')
-rw-r--r-- | arch/arm/boot/dts/rk3288-veyron.dtsi | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi index 2075120cfc4d..d8bf939a3aff 100644 --- a/arch/arm/boot/dts/rk3288-veyron.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron.dtsi @@ -10,7 +10,11 @@ #include "rk3288.dtsi" / { - memory@0 { + /* + * The default coreboot on veyron devices ignores memory@0 nodes + * and would instead create another memory node. + */ + memory { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; }; |