diff options
author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2015-07-29 01:14:59 +0300 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2015-07-30 09:05:15 +0900 |
commit | a42fc57a9e9d1dbb1d8cc0c3ccf2d7ea1a939559 (patch) | |
tree | e471cc14e2914f8f2d66d5acc17637fd8ee3ccf7 /arch/arm/boot/dts/r8a7794-silk.dts | |
parent | fd1683c18c372d51aeeeb25efa8b451f922c9c52 (diff) | |
download | linux-a42fc57a9e9d1dbb1d8cc0c3ccf2d7ea1a939559.tar.bz2 |
ARM: shmobile: silk: initial device tree
Add the initial device tree for the R8A7794 SoC based SILK low cost board.
SCIF2 serial port support is included, so that the serial console can work.
Based on the original patch by Vladimir Barinov
<vladimir.barinov@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7794-silk.dts')
-rw-r--r-- | arch/arm/boot/dts/r8a7794-silk.dts | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts new file mode 100644 index 000000000000..f3da95b1dedd --- /dev/null +++ b/arch/arm/boot/dts/r8a7794-silk.dts @@ -0,0 +1,51 @@ +/* + * Device Tree Source for the SILK board + * + * Copyright (C) 2014 Renesas Electronics Corporation + * Copyright (C) 2014-2015 Renesas Solutions Corp. + * Copyright (C) 2014-2015 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +#include "r8a7794.dtsi" + +/ { + model = "SILK"; + compatible = "renesas,silk", "renesas,r8a7794"; + + aliases { + serial0 = &scif2; + }; + + chosen { + bootargs = "ignore_loglevel"; + stdout-path = &scif2; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0 0x40000000 0 0x40000000>; + }; +}; + +&extal_clk { + clock-frequency = <20000000>; +}; + +&pfc { + scif2_pins: serial2 { + renesas,groups = "scif2_data"; + renesas,function = "scif2"; + }; +}; + +&scif2 { + pinctrl-0 = <&scif2_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; |