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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-01-29 11:17:19 +0100 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2016-02-09 19:43:25 +0100 |
commit | 33ef9688ae45d19bf11c75a7c403a4f20804720d (patch) | |
tree | de395f51f2716c17a93e840cdb412598b9e6e483 /arch/arm/boot/dts/r8a7778-bockw.dts | |
parent | 8a758a9493d8cac4afde82918590a11bbb24c85c (diff) | |
download | linux-33ef9688ae45d19bf11c75a7c403a4f20804720d.tar.bz2 |
ARM: dts: bockw: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
This increases the range and accuracy of supported baud rates.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7778-bockw.dts')
-rw-r--r-- | arch/arm/boot/dts/r8a7778-bockw.dts | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts index a52b359e2ae2..21e3b9dda2da 100644 --- a/arch/arm/boot/dts/r8a7778-bockw.dts +++ b/arch/arm/boot/dts/r8a7778-bockw.dts @@ -126,11 +126,19 @@ }; &pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + scif0_pins: serial0 { renesas,groups = "scif0_data_a", "scif0_ctrl"; renesas,function = "scif0"; }; + scif_clk_pins: scif_clk { + renesas,groups = "scif_clk"; + renesas,function = "scif_clk"; + }; + mmc_pins: mmc { renesas,groups = "mmc_data8", "mmc_ctrl"; renesas,function = "mmc"; @@ -217,3 +225,8 @@ status = "okay"; }; + +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; |