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authorBiju Das <biju.das@bp.renesas.com>2018-01-24 16:11:51 +0000
committerSimon Horman <horms+renesas@verge.net.au>2018-02-12 13:50:58 +0100
commit0565605aa9887a3d6423fb08c0cbb0de3a22f838 (patch)
tree30823d638a03df5700b53119dd40d3521c8dff8e /arch/arm/boot/dts/r8a7743.dtsi
parent0dcba3de58354e35c91a31dafe597e81e7c22294 (diff)
downloadlinux-0565605aa9887a3d6423fb08c0cbb0de3a22f838.tar.bz2
ARM: dts: r8a7743: Add VSP support
Add VSP support to SoC DT. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7743.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7743.dtsi27
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 11a1263211eb..1d9073ba0ce0 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1630,6 +1630,33 @@
status = "disabled";
};
+ vsp@fe928000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe928000 0 0x8000>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 131>;
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 131>;
+ };
+
+ vsp@fe930000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe930000 0 0x8000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 128>;
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 128>;
+ };
+
+ vsp@fe938000 {
+ compatible = "renesas,vsp1";
+ reg = <0 0xfe938000 0 0x8000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 127>;
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 127>;
+ };
+
du: display@feb00000 {
compatible = "renesas,du-r8a7743";
reg = <0 0xfeb00000 0 0x40000>,