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authorLinus Torvalds <torvalds@linux-foundation.org>2015-04-22 09:24:55 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2015-04-22 09:24:55 -0700
commit8b3c8ba3d8c2680dab5363a80c024965cac08b1e (patch)
tree18150efb36891e6e76e2cad89c1b2fcc5faeae93 /arch/arm/boot/dts/omap3.dtsi
parentd34dc4f9e88e4b6beefb819e4e743fd6160a9b75 (diff)
parent48c1078509b47b38802329028ccfd77783bcff99 (diff)
downloadlinux-8b3c8ba3d8c2680dab5363a80c024965cac08b1e.tar.bz2
Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late changes from Olof Johansson: "We were expecting to sit on this branch through most of the merge window since the contents was merged into our tree late, but we ended up sitting on all of our contents so it can go in with the rest. The contents here is: - a large branch of cleanups of the CM/PRM blocks on OMAP. - a couple of patches plumbing up CM/PRM on OMAP5 and DRA7. - a branch with DT updates for Freescale i.MX. including some shuffling from .dts to .dtsi (include) files that causes a little churn" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (78 commits) ARM: OMAP2+: Fix booting with configs that don't have MFD_SYSCON ARM: OMAP4+: control: add support for initializing control module via DT ARM: dts: dra7: add minimal l4 bus layout with control module support ARM: dts: omap5: add minimal l4 bus layout with control module support ARM: OMAP4+: control: remove support for legacy pad read/write ARM: OMAP4: display: convert display to use syscon for dsi muxing ARM: dts: omap4: add minimal l4 bus layout with control module support ARM: dts: am4372: add minimal l4 bus layout with control module support ARM: dts: am43xx-epos-evm: fix pinmux node layout ARM: dts: am33xx: add minimal l4 bus layout with control module support ARM: dts: omap3: add minimal l4 bus layout with control module support ARM: dts: omap24xx: add minimal l4 bus layout with control module support ARM: OMAP2+: control: add syscon support for register accesses ARM: OMAP2+: id: cache omap_type value ARM: OMAP2+: control: remove API for getting control module base address ARM: OMAP2+: clock: add low-level support for regmap ARM: OMAP4+: PRM: get rid of cpu_is_omap44xx calls from interrupt init ARM: OMAP4+: PRM: setup prm_features from the PRM init time flags ARM: OMAP2+: CM: move SoC specific init calls within a generic API ARM: OMAP4+: PRM: determine prm_device_inst based on DT compatibility ...
Diffstat (limited to 'arch/arm/boot/dts/omap3.dtsi')
-rw-r--r--arch/arm/boot/dts/omap3.dtsi96
1 files changed, 55 insertions, 41 deletions
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 3fdc84fddb70..d18a90f5eca3 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -87,6 +87,60 @@
ranges;
ti,hwmods = "l3_main";
+ l4_core: l4@48000000 {
+ compatible = "ti,omap3-l4-core", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x48000000 0x1000000>;
+
+ scm: scm@2000 {
+ compatible = "ti,omap3-scm", "simple-bus";
+ reg = <0x2000 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x2000 0x2000>;
+
+ omap3_pmx_core: pinmux@30 {
+ compatible = "ti,omap3-padconf",
+ "pinctrl-single";
+ reg = <0x30 0x238>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ pinctrl-single,register-width = <16>;
+ pinctrl-single,function-mask = <0xff1f>;
+ };
+
+ scm_conf: scm_conf@270 {
+ compatible = "syscon";
+ reg = <0x270 0x330>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ scm_clocks: clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ scm_clockdomains: clockdomains {
+ };
+
+ omap3_pmx_wkup: pinmux@a00 {
+ compatible = "ti,omap3-padconf",
+ "pinctrl-single";
+ reg = <0xa00 0x5c>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ pinctrl-single,register-width = <16>;
+ pinctrl-single,function-mask = <0xff1f>;
+ };
+ };
+ };
+
aes: aes@480c5000 {
compatible = "ti,omap3-aes";
ti,hwmods = "aes";
@@ -123,19 +177,6 @@
};
};
- scrm: scrm@48002000 {
- compatible = "ti,omap3-scrm";
- reg = <0x48002000 0x2000>;
-
- scrm_clocks: clocks {
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- scrm_clockdomains: clockdomains {
- };
- };
-
counter32k: counter@48320000 {
compatible = "ti,omap-counter32k";
reg = <0x48320000 0x20>;
@@ -161,37 +202,10 @@
dma-requests = <96>;
};
- omap3_pmx_core: pinmux@48002030 {
- compatible = "ti,omap3-padconf", "pinctrl-single";
- reg = <0x48002030 0x0238>;
- #address-cells = <1>;
- #size-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-controller;
- pinctrl-single,register-width = <16>;
- pinctrl-single,function-mask = <0xff1f>;
- };
-
- omap3_pmx_wkup: pinmux@48002a00 {
- compatible = "ti,omap3-padconf", "pinctrl-single";
- reg = <0x48002a00 0x5c>;
- #address-cells = <1>;
- #size-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-controller;
- pinctrl-single,register-width = <16>;
- pinctrl-single,function-mask = <0xff1f>;
- };
-
- omap3_scm_general: tisyscon@48002270 {
- compatible = "syscon";
- reg = <0x48002270 0x2f0>;
- };
-
pbias_regulator: pbias_regulator {
compatible = "ti,pbias-omap";
reg = <0x2b0 0x4>;
- syscon = <&omap3_scm_general>;
+ syscon = <&scm_conf>;
pbias_mmc_reg: pbias_mmc_omap2430 {
regulator-name = "pbias_mmc_omap2430";
regulator-min-microvolt = <1800000>;