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author | Matthias Brugger <matthias.bgg@gmail.com> | 2014-05-13 01:06:13 +0200 |
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committer | Matthias Brugger <matthias.bgg@gmail.com> | 2014-07-22 17:52:37 +0200 |
commit | f682a21854166d66e67606283dffd8d9fe31dbee (patch) | |
tree | 2e07eb052734bbafb310b2908a26c2a22b6b61aa /arch/arm/boot/dts/mt6589.dtsi | |
parent | 7171511eaec5bf23fb06078f59784a3a0626b38f (diff) | |
download | linux-f682a21854166d66e67606283dffd8d9fe31dbee.tar.bz2 |
arm: add basic support for Mediatek MT6589 boards
This adds a generic devicetree board file and a dtsi for boards
based on MT6589 SoCs from Mediatek.
Apart from the generic parts (gic, clocks) the only component
currently supported are the timers.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/mt6589.dtsi')
-rw-r--r-- | arch/arm/boot/dts/mt6589.dtsi | 94 |
1 files changed, 94 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/mt6589.dtsi b/arch/arm/boot/dts/mt6589.dtsi new file mode 100644 index 000000000000..d0297a051549 --- /dev/null +++ b/arch/arm/boot/dts/mt6589.dtsi @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2014 MundoReader S.L. + * Author: Matthias Brugger <matthias.bgg@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include "skeleton.dtsi" + +/ { + compatible = "mediatek,mt6589"; + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + }; + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x1>; + }; + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x2>; + }; + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x3>; + }; + + }; + + clocks { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + + system_clk: dummy13m { + compatible = "fixed-clock"; + clock-frequency = <13000000>; + #clock-cells = <0>; + }; + + rtc_clk: dummy32k { + compatible = "fixed-clock"; + clock-frequency = <32000>; + #clock-cells = <0>; + }; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + + timer: timer@10008000 { + compatible = "mediatek,mt6577-timer"; + reg = <0x10008000 0x80>; + interrupts = <GIC_SPI 113 IRQ_TYPE_EDGE_RISING>; + clocks = <&system_clk>, <&rtc_clk>; + clock-names = "system-clk", "rtc-clk"; + }; + + gic: interrupt-controller@10212000 { + compatible = "arm,cortex-a15-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x10211000 0x1000>, + <0x10212000 0x1000>, + <0x10214000 0x2000>, + <0x10216000 0x2000>; + }; + }; +}; |