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authorPhilipp Zabel <p.zabel@pengutronix.de>2013-03-28 17:35:23 +0100
committerShawn Guo <shawn.guo@linaro.org>2013-04-09 22:52:57 +0800
commit8d84c3740fb0c97b5b01ad565f9d4e2ca84bf670 (patch)
tree979e8441375a73b206d636e7f5a096e1a03e2af5 /arch/arm/boot/dts/imx51.dtsi
parent09ebf366599d691ef25c343cb66fe19ce2a74d52 (diff)
downloadlinux-8d84c3740fb0c97b5b01ad565f9d4e2ca84bf670.tar.bz2
ARM i.MX5: Add system reset controller (SRC) to i.MX51 and i.MX53 device tree
Also, link SRC to IPU via phandle. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx51.dtsi')
-rw-r--r--arch/arm/boot/dts/imx51.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 76d84a4b8508..0f6d3315f7c8 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -70,6 +70,7 @@
interrupts = <11 10>;
clocks = <&clks 59>, <&clks 110>, <&clks 61>;
clock-names = "bus", "di0", "di1";
+ resets = <&src 2>;
};
aips@70000000 { /* AIPS1 */
@@ -529,6 +530,12 @@
status = "disabled";
};
+ src: src@73fd0000 {
+ compatible = "fsl,imx51-src";
+ reg = <0x73fd0000 0x4000>;
+ #reset-cells = <1>;
+ };
+
clks: ccm@73fd4000{
compatible = "fsl,imx51-ccm";
reg = <0x73fd4000 0x4000>;