diff options
author | Krzysztof Kozlowski <krzk@kernel.org> | 2016-05-08 18:41:57 +0200 |
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committer | Krzysztof Kozlowski <k.kozlowski@samsung.com> | 2016-05-31 12:42:40 +0200 |
commit | c9cf996d854b8f96d450083d3e0aace457a5a46b (patch) | |
tree | e939c2fcd63e941ccdae7a7a3a1ebb28fbfb2489 /arch/arm/boot/dts/exynos54xx.dtsi | |
parent | 3f2f95ff6aa3490ae57364424b59b80cbff6be29 (diff) | |
download | linux-c9cf996d854b8f96d450083d3e0aace457a5a46b.tar.bz2 |
ARM: dts: exynos: Move common Exynos5410/542x/5800 nodes to new DTSI
The Exynos5410/542x/5800 are very similar designs. Create a new
DTSI with common nodes to remove DTS duplication. Although currently
only MCT and SysRAM are shared but in future more nodes will be added to
the common file.
The patch should not have functional impact.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos54xx.dtsi')
-rw-r--r-- | arch/arm/boot/dts/exynos54xx.dtsi | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi new file mode 100644 index 000000000000..1bcfb7f455c1 --- /dev/null +++ b/arch/arm/boot/dts/exynos54xx.dtsi @@ -0,0 +1,68 @@ +/* + * Samsung's Exynos54xx SoC series common device tree source + * + * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Copyright (c) 2016 Krzysztof Kozlowski + * + * Device nodes common for Samsung Exynos5410/5420/5422/5800. Specific + * Exynos 54xx SoCs should include this file and customize it further + * (e.g. with clocks). + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "skeleton.dtsi" +#include "exynos5.dtsi" + +/ { + compatible = "samsung,exynos5"; + + soc: soc { + sysram@02020000 { + compatible = "mmio-sram"; + reg = <0x02020000 0x54000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x02020000 0x54000>; + + smp-sysram@0 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x0 0x1000>; + }; + + smp-sysram@53000 { + compatible = "samsung,exynos4210-sysram-ns"; + reg = <0x53000 0x1000>; + }; + }; + + mct: mct@101c0000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x101c0000 0xb00>; + interrupt-parent = <&mct_map>; + interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>, + <8>, <9>, <10>, <11>; + + mct_map: mct-map { + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = <0 &combiner 23 3>, + <1 &combiner 23 4>, + <2 &combiner 25 2>, + <3 &combiner 25 3>, + <4 &gic 0 120 0>, + <5 &gic 0 121 0>, + <6 &gic 0 122 0>, + <7 &gic 0 123 0>, + <8 &gic 0 128 0>, + <9 &gic 0 129 0>, + <10 &gic 0 130 0>, + <11 &gic 0 131 0>; + }; + }; + }; +}; |