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| author | Lukasz Luba <l.luba@partner.samsung.com> | 2019-10-02 08:04:52 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2019-10-02 19:32:26 +0200 |
| commit | 63cf62ddb983c97d19815bb3a480e05ccd9c52b6 (patch) | |
| tree | 41e0b127ccb87e615d5f10ee25e4537f130db479 /arch/arm/boot/dts/exynos5420.dtsi | |
| parent | 40192209b96b65ff3588e063c5b984e946baaaae (diff) | |
| download | linux-63cf62ddb983c97d19815bb3a480e05ccd9c52b6.tar.bz2 | |
ARM: dts: exynos: Extend mapped region for DMC on Exynos5422
DMC Adaptive Voltage and Frequency Scaling driver in interrupt mode
needs to access registers at address offset near 0x10000. These
registers are private DMC performance counters, which might be used
as interrupt trigger when overflow. Potential usage is to skip polling
in devfreq framework and switch to interrupt managed bandwidth control.
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos5420.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/exynos5420.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 92c5e0d8a824..3293807b99ad 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -239,7 +239,7 @@ dmc: memory-controller@10c20000 { compatible = "samsung,exynos5422-dmc"; - reg = <0x10c20000 0x100>, <0x10c30000 0x100>; + reg = <0x10c20000 0x10000>, <0x10c30000 0x10000>; clocks = <&clock CLK_FOUT_SPLL>, <&clock CLK_MOUT_SCLK_SPLL>, <&clock CLK_FF_DOUT_SPLL2>, |