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authorMarian Mihailescu <mihailescu2m@gmail.com>2017-11-23 15:34:30 +0100
committerKrzysztof Kozlowski <krzk@kernel.org>2017-12-04 17:45:42 +0100
commitc4f2fc00defc65950dfabce7a4c70cd2a289111d (patch)
tree2ba2df2cfc6f7610fb20227b6200a62c20ffe0ca /arch/arm/boot/dts/exynos5410.dtsi
parentcdd745c8c76b02471d88f467c44a3d4eb431aa0b (diff)
downloadlinux-c4f2fc00defc65950dfabce7a4c70cd2a289111d.tar.bz2
ARM: dts: exynos: Add CPU perf counters to Exynos54xx boards
Enable support for ARM Performance Monitoring Units available in Cortex-A7 and Cortex-A15 CPU cores for Exynos54xx SoCs (5410, 5420 and 5422/5800). The PMUs interrupts are defined in the common exynos54xx.dtsi device tree, but the PMUs are enabled and have their interrupt CPU affinity defined next to each SoC's cpus node. Tested with perf on Odroid XU4 (Exynos5422): armv7_cortex_a7 PMU driver: 5 counters available armv7_cortex_a15 PMU driver: 7 counters available Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Marian Mihailescu <mihailescu2m@gmail.com> Signed-off-by: Willy Wolff <willy.mh.wolff@gmail.com> [mszyprow: reordered nodes according to krzk request, fixed typos] Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos5410.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos5410.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
index 06713ec86f0d..c4dbc689e5cb 100644
--- a/arch/arm/boot/dts/exynos5410.dtsi
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -264,6 +264,11 @@
};
};
+&arm_a15_pmu {
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+ status = "okay";
+};
+
&i2c_0 {
clocks = <&clock CLK_I2C0>;
clock-names = "i2c";