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authorChanwoo Choi <cw00.choi@samsung.com>2016-04-11 12:57:58 +0900
committerKrzysztof Kozlowski <k.kozlowski@samsung.com>2016-05-03 12:22:59 +0200
commit4f20aa0eebe0d66f89b39cbd741632ff7be7f6be (patch)
tree650b01de1aa5d16a9f763e0894024481d45d3e72 /arch/arm/boot/dts/exynos4412-trats2.dts
parent918f7c2d5095e4067eb77a54425fd6e1bab5787f (diff)
downloadlinux-4f20aa0eebe0d66f89b39cbd741632ff7be7f6be.tar.bz2
ARM: dts: exynos: Add support of bus frequency for exynos4412-trats/odroidu3
This patch adds the bus device tree nodes for both MIF (Memory) and INT (Internal) block to enable the bus frequency. The DMC bus is parent device in MIF block using VDD_MIF and the LEFTBUS bus is parent device in INT block using VDD_INT. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> [m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board] Tested-by: Markus Reichl <m.reichl@fivetechno.de> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos4412-trats2.dts')
-rw-r--r--arch/arm/boot/dts/exynos4412-trats2.dts47
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index dce3cebe0606..9f3fb9a7f5f4 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -289,6 +289,53 @@
status = "okay";
};
+&bus_dmc {
+ devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
+ vdd-supply = <&buck1_reg>;
+ status = "okay";
+};
+
+&bus_acp {
+ devfreq = <&bus_dmc>;
+ status = "okay";
+};
+
+&bus_c2c {
+ devfreq = <&bus_dmc>;
+ status = "okay";
+};
+
+&bus_leftbus {
+ devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
+ vdd-supply = <&buck3_reg>;
+ status = "okay";
+};
+
+&bus_rightbus {
+ devfreq = <&bus_leftbus>;
+ status = "okay";
+};
+
+&bus_display {
+ devfreq = <&bus_leftbus>;
+ status = "okay";
+};
+
+&bus_fsys {
+ devfreq = <&bus_leftbus>;
+ status = "okay";
+};
+
+&bus_peri {
+ devfreq = <&bus_leftbus>;
+ status = "okay";
+};
+
+&bus_mfc {
+ devfreq = <&bus_leftbus>;
+ status = "okay";
+};
+
&cpu0 {
cpu0-supply = <&buck2_reg>;
};