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| author | Krzysztof Kozlowski <krzk@kernel.org> | 2018-04-16 20:11:25 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2018-04-21 18:51:45 +0200 |
| commit | a03e9dacb9d2dd4bb14ce91bfeeee1e39235a6b1 (patch) | |
| tree | dcf2a87138ca2a3fbc057d68498071338872b92b /arch/arm/boot/dts/exynos-syscon-restart.dtsi | |
| parent | 013fdd1ea0ceb719ed0dd13cbf232a9ca1b3246b (diff) | |
| download | linux-a03e9dacb9d2dd4bb14ce91bfeeee1e39235a6b1.tar.bz2 | |
ARM: dts: exynos: Move syscon poweroff and restart nodes under the PMU
The PMU node is the actual block responsible for power management,
including typical Exynos on/off/restart procedures. Therefore the
syscon poweroff and restart nodes logically belong to it.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos-syscon-restart.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/exynos-syscon-restart.dtsi | 28 |
1 files changed, 12 insertions, 16 deletions
diff --git a/arch/arm/boot/dts/exynos-syscon-restart.dtsi b/arch/arm/boot/dts/exynos-syscon-restart.dtsi index 4b3dd0549a54..ecf416690a15 100644 --- a/arch/arm/boot/dts/exynos-syscon-restart.dtsi +++ b/arch/arm/boot/dts/exynos-syscon-restart.dtsi @@ -3,22 +3,18 @@ * Samsung's Exynos SoC syscon reboot/poweroff nodes common definition. */ -/ { - soc { - compatible = "simple-bus"; - - poweroff: syscon-poweroff { - compatible = "syscon-poweroff"; - regmap = <&pmu_system_controller>; - offset = <0x330C>; /* PS_HOLD_CONTROL */ - mask = <0x5200>; /* reset value */ - }; +&pmu_system_controller { + poweroff: syscon-poweroff { + compatible = "syscon-poweroff"; + regmap = <&pmu_system_controller>; + offset = <0x330C>; /* PS_HOLD_CONTROL */ + mask = <0x5200>; /* reset value */ + }; - reboot: syscon-reboot { - compatible = "syscon-reboot"; - regmap = <&pmu_system_controller>; - offset = <0x0400>; /* SWRESET */ - mask = <0x1>; - }; + reboot: syscon-reboot { + compatible = "syscon-reboot"; + regmap = <&pmu_system_controller>; + offset = <0x0400>; /* SWRESET */ + mask = <0x1>; }; }; |