diff options
author | Eric Anholt <eric@anholt.net> | 2015-04-16 15:26:45 -0700 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2015-12-31 17:17:00 +0100 |
commit | 80534f095f182d9067a9ea02073b37f771f77d40 (patch) | |
tree | c6d609a489c0f1de9205f6586069b95d335023f4 /arch/arm/boot/dts/bcm2836.dtsi | |
parent | 4b8c3907c3090d019efdeb02765db209927c0c4f (diff) | |
download | linux-80534f095f182d9067a9ea02073b37f771f77d40.tar.bz2 |
ARM: bcm2835: Add devicetree for bcm2836 and Raspberry Pi 2 B
The Pi 2 B ends up like a Pi 1 B+, with the same peripherals and
pinout, but the CPU and memory layout changed to use the 2836.
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/bcm2836.dtsi')
-rw-r--r-- | arch/arm/boot/dts/bcm2836.dtsi | 78 |
1 files changed, 78 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm2836.dtsi b/arch/arm/boot/dts/bcm2836.dtsi new file mode 100644 index 000000000000..9d0651d8f373 --- /dev/null +++ b/arch/arm/boot/dts/bcm2836.dtsi @@ -0,0 +1,78 @@ +#include "bcm283x.dtsi" + +/ { + compatible = "brcm,bcm2836"; + + soc { + ranges = <0x7e000000 0x3f000000 0x1000000>, + <0x40000000 0x40000000 0x00001000>; + dma-ranges = <0xc0000000 0x00000000 0x3f000000>; + + local_intc: local_intc { + compatible = "brcm,bcm2836-l1-intc"; + reg = <0x40000000 0x100>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&local_intc>; + }; + + arm-pmu { + compatible = "arm,cortex-a7-pmu"; + interrupt-parent = <&local_intc>; + interrupts = <9>; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupt-parent = <&local_intc>; + interrupts = <0>, // PHYS_SECURE_PPI + <1>, // PHYS_NONSECURE_PPI + <3>, // VIRT_PPI + <2>; // HYP_PPI + always-on; + }; + + cpus: cpus { + #address-cells = <1>; + #size-cells = <0>; + + v7_cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0xf00>; + clock-frequency = <800000000>; + }; + + v7_cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0xf01>; + clock-frequency = <800000000>; + }; + + v7_cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0xf02>; + clock-frequency = <800000000>; + }; + + v7_cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0xf03>; + clock-frequency = <800000000>; + }; + }; +}; + +/* Make the BCM2835-style global interrupt controller be a child of the + * CPU-local interrupt controller. + */ +&intc { + compatible = "brcm,bcm2836-armctrl-ic"; + reg = <0x7e00b200 0x200>; + interrupt-parent = <&local_intc>; + interrupts = <8>; +}; |