summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/at91sam9g45.dtsi
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2014-12-16 14:26:26 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2014-12-16 14:26:26 -0800
commit205dc205ed3ba748bab9770016bbbffb68558146 (patch)
tree100ae66d7ed97e3ecede3288797aa4e2962f2b0d /arch/arm/boot/dts/at91sam9g45.dtsi
parent94bbdb63d7ed5ca56b788e43d0ca4a8f9494c9e7 (diff)
parent1d5f497d87c7d960c27cdc40e7563b0ae88387d3 (diff)
downloadlinux-205dc205ed3ba748bab9770016bbbffb68558146.tar.bz2
Merge tag 'dt2-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC DT updates part 2 from Arnd Bergmann: "This is a follow-up to the early ARM SoC DT changes, with additional content that has external dependencies: - The Tegra IOMMU DT support depends on changes from the iommu tree, plus the contents of the arm-soc drivers branch - The MVEBU PHY support depends on changes from the phy tree - The AT91 DT support depends on changes from the RTC and DMA-slave trees All of these changes just enable additional devices for existing platforms" * tag 'dt2-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: tegra: Enable IOMMU for display controllers on Tegra124 ARM: tegra: Enable IOMMU for display controllers on Tegra114 ARM: tegra: Enable IOMMU for display controllers on Tegra30 ARM: tegra: Add memory controller support for Tegra124 ARM: tegra: Add memory controller support for Tegra114 ARM: tegra: Add memory controller support for Tegra30 ARM: tegra: Add APB_MISC_GP as a MIPI pad control bank ARM: mvebu: add PHY support to the dts for the USB controllers on Armada 375 ARM: mvebu: add Device Tree description of USB cluster controller on Armada 375 ARM: at91/dt: at91sam9g45: add ISI node ARM: at91/dt: enable the RTT block on the at91sam9m10g45ek board ARM: at91/dt: enable the RTT block on the sam9g20ek board ARM: at91/dt: add GPBR nodes ARM: at91/dt: add RTT nodes to at91 dtsis ARM: at91/dt: at91sam9rl: add rtc ARM: at91: fix GPLv2 wording ARM: at91/dt: sama5d4: add DMA support ARM: at91/dt: sama5d4: use macro instead of numeric value
Diffstat (limited to 'arch/arm/boot/dts/at91sam9g45.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi46
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 6c0637a4bda5..2a8da8a884b4 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -492,6 +492,27 @@
};
};
+ isi {
+ pinctrl_isi: isi-0 {
+ atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* D8 */
+ AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* D9 */
+ AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* D10 */
+ AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* D11 */
+ AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* D0 */
+ AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* D1 */
+ AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* D2 */
+ AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* D3 */
+ AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* D4 */
+ AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* D5 */
+ AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* D6 */
+ AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* D7 */
+ AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PCK */
+ AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* VSYNC */
+ AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* HSYNC */
+ AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* MCK */>;
+ };
+ };
+
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
@@ -1035,6 +1056,17 @@
};
};
+ isi@fffb4000 {
+ compatible = "atmel,at91sam9g45-isi";
+ reg = <0xfffb4000 0x4000>;
+ interrupts = <26 IRQ_TYPE_LEVEL_HIGH 5>;
+ clocks = <&isi_clk>;
+ clock-names = "isi_clk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_isi>;
+ status = "disabled";
+ };
+
pwm0: pwm@fffb8000 {
compatible = "atmel,at91sam9rl-pwm";
reg = <0xfffb8000 0x300>;
@@ -1199,12 +1231,26 @@
};
};
+ rtc@fffffd20 {
+ compatible = "atmel,at91sam9260-rtt";
+ reg = <0xfffffd20 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&clk32k>;
+ status = "disabled";
+ };
+
rtc@fffffdb0 {
compatible = "atmel,at91rm9200-rtc";
reg = <0xfffffdb0 0x30>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
status = "disabled";
};
+
+ gpbr: syscon@fffffd60 {
+ compatible = "atmel,at91sam9260-gpbr", "syscon";
+ reg = <0xfffffd60 0x10>;
+ status = "disabled";
+ };
};
fb0: fb@0x00500000 {