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| author | Joel Stanley <joel@jms.id.au> | 2020-09-21 18:46:44 +0930 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2020-09-25 10:14:12 +0930 |
| commit | fe100b382c1c052b63c14091fd8bb3fe932453ae (patch) | |
| tree | abac7568839e6322448b4ae8b053e003fafc0623 /arch/arm/boot/dts/aspeed-g6.dtsi | |
| parent | e0218dca5787c851b403fcbc33cdfec795446fca (diff) | |
| download | linux-fe100b382c1c052b63c14091fd8bb3fe932453ae.tar.bz2 | |
ARM: dts: aspeed: Add silicon id node
This register describes the silicon id and chip unique id. It varies
between CPU revisions, but is always part of the SCU.
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20200921091644.133107-4-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g6.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/aspeed-g6.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index b58220a49cbd..1ce3a1f06f7f 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -311,6 +311,11 @@ compatible = "aspeed,ast2600-pinctrl"; }; + silicon-id@14 { + compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id"; + reg = <0x14 0x4 0x5b0 0x8>; + }; + smp-memram@180 { compatible = "aspeed,ast2600-smpmem"; reg = <0x180 0x40>; |