diff options
author | Roger Quadros <rogerq@ti.com> | 2016-02-23 18:37:22 +0200 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2016-02-26 10:32:14 -0800 |
commit | db0f68529a6a7f3f42486398275926be946903b0 (patch) | |
tree | aff7b268a9c1d0c9835c73908cf272cec0015c36 /arch/arm/boot/dts/am335x-phycore-som.dtsi | |
parent | 03752148384652743069776e7023a8e46ed9164b (diff) | |
download | linux-db0f68529a6a7f3f42486398275926be946903b0.tar.bz2 |
ARM: dts: am335x: Disable wait pin monitoring for NAND
The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].
[1] AM335x TRM: SPRUH73L: 7.1.3.3.12.2 NAND Device-Ready Pin
Cc: Teresa Remmet <t.remmet@phytec.de>
Cc: Ilya Ledvich <ilya@compulab.co.il>
Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Rostislav Lisovy <lisovy@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/am335x-phycore-som.dtsi')
-rw-r--r-- | arch/arm/boot/dts/am335x-phycore-som.dtsi | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi b/arch/arm/boot/dts/am335x-phycore-som.dtsi index 80a56873a055..d4b7f3bd553f 100644 --- a/arch/arm/boot/dts/am335x-phycore-som.dtsi +++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi @@ -189,13 +189,10 @@ gpmc,access-ns = <30>; gpmc,rd-cycle-ns = <30>; gpmc,wr-cycle-ns = <30>; - gpmc,wait-on-read = "true"; - gpmc,wait-on-write = "true"; gpmc,bus-turnaround-ns = <0>; gpmc,cycle2cycle-delay-ns = <50>; gpmc,cycle2cycle-diffcsen; gpmc,clk-activation-ns = <0>; - gpmc,wait-monitoring-ns = <0>; gpmc,wr-access-ns = <30>; gpmc,wr-data-mux-bus-ns = <0>; |