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| author | Olof Johansson <olof@lixom.net> | 2019-12-05 13:16:58 -0800 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2019-12-05 13:18:54 -0800 |
| commit | 942e6f8a8314e5550e254519dfba4ccd5170421d (patch) | |
| tree | 75ec655b440fbc1c454247af38b5596dd8c78de9 /arch/arc/mm/tlbex.S | |
| parent | 336bab731be76a90291697e51d2aed0ad67d7cb5 (diff) | |
| parent | b08baef02b26cf7c2123e4a24a2fa1fb7a593ffb (diff) | |
| download | linux-942e6f8a8314e5550e254519dfba4ccd5170421d.tar.bz2 | |
Merge mainline/master into arm/fixes
This brings in the mainline tree right after armsoc contents was merged
this release cycle, so that we can re-run savedefconfig, etc.
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arc/mm/tlbex.S')
| -rw-r--r-- | arch/arc/mm/tlbex.S | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S index c55d95dd2f39..2efaf6ca0c06 100644 --- a/arch/arc/mm/tlbex.S +++ b/arch/arc/mm/tlbex.S @@ -122,17 +122,27 @@ ex_saved_reg1: #else /* ARCv2 */ .macro TLBMISS_FREEUP_REGS +#ifdef CONFIG_ARC_HAS_LL64 + std r0, [sp, -16] + std r2, [sp, -8] +#else PUSH r0 PUSH r1 PUSH r2 PUSH r3 +#endif .endm .macro TLBMISS_RESTORE_REGS +#ifdef CONFIG_ARC_HAS_LL64 + ldd r0, [sp, -16] + ldd r2, [sp, -8] +#else POP r3 POP r2 POP r1 POP r0 +#endif .endm #endif @@ -193,7 +203,7 @@ ex_saved_reg1: lr r2, [efa] -#ifndef CONFIG_SMP +#ifdef ARC_USE_SCRATCH_REG lr r1, [ARC_REG_SCRATCH_DATA0] ; current pgd #else GET_CURR_TASK_ON_CPU r1 @@ -282,11 +292,7 @@ ex_saved_reg1: sr TLBGetIndex, [ARC_REG_TLBCOMMAND] /* Commit the Write */ -#if (CONFIG_ARC_MMU_VER >= 2) /* introduced in v2 */ sr TLBWriteNI, [ARC_REG_TLBCOMMAND] -#else - sr TLBWrite, [ARC_REG_TLBCOMMAND] -#endif #else sr TLBInsertEntry, [ARC_REG_TLBCOMMAND] @@ -370,9 +376,7 @@ ENTRY(EV_TLBMissD) ;---------------------------------------------------------------- ; UPDATE_PTE: Let Linux VM know that page was accessed/dirty - lr r3, [ecr] or r0, r0, _PAGE_ACCESSED ; Accessed bit always - btst_s r3, ECR_C_BIT_DTLB_ST_MISS ; See if it was a Write Access ? or.nz r0, r0, _PAGE_DIRTY ; if Write, set Dirty bit as well st_s r0, [r1] ; Write back PTE |