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author | Tony Lindgren <tony@atomide.com> | 2015-11-25 10:56:40 -0800 |
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committer | Tony Lindgren <tony@atomide.com> | 2015-11-25 10:56:40 -0800 |
commit | 970259bff472579204108c6f27036ec4d1206ae1 (patch) | |
tree | 869bdcda9aac4c67712d93e6141056fdf3f41bd8 /arch/arc/mm/tlbex.S | |
parent | 9b1b61cd8e31d9beba871333d7a798b3adb89288 (diff) | |
parent | 29f5b34ca1a191c2cf4f6c8c12f4dec56e8d3bc1 (diff) | |
download | linux-970259bff472579204108c6f27036ec4d1206ae1.tar.bz2 |
Merge branch '81xx' into omap-for-v4.4/fixes
Diffstat (limited to 'arch/arc/mm/tlbex.S')
-rw-r--r-- | arch/arc/mm/tlbex.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S index 63860adc4814..f1967eeb32e7 100644 --- a/arch/arc/mm/tlbex.S +++ b/arch/arc/mm/tlbex.S @@ -88,7 +88,7 @@ ex_saved_reg1: #ifdef CONFIG_SMP sr r0, [ARC_REG_SCRATCH_DATA0] ; freeup r0 to code with GET_CPU_ID r0 ; get to per cpu scratch mem, - lsl r0, r0, L1_CACHE_SHIFT ; cache line wide per cpu + asl r0, r0, L1_CACHE_SHIFT ; cache line wide per cpu add r0, @ex_saved_reg1, r0 #else st r0, [@ex_saved_reg1] @@ -107,7 +107,7 @@ ex_saved_reg1: .macro TLBMISS_RESTORE_REGS #ifdef CONFIG_SMP GET_CPU_ID r0 ; get to per cpu scratch mem - lsl r0, r0, L1_CACHE_SHIFT ; each is cache line wide + asl r0, r0, L1_CACHE_SHIFT ; each is cache line wide add r0, @ex_saved_reg1, r0 ld_s r3, [r0,12] ld_s r2, [r0, 8] @@ -256,7 +256,7 @@ ex_saved_reg1: .macro CONV_PTE_TO_TLB and r3, r0, PTE_BITS_RWX ; r w x - lsl r2, r3, 3 ; Kr Kw Kx 0 0 0 (GLOBAL, kernel only) + asl r2, r3, 3 ; Kr Kw Kx 0 0 0 (GLOBAL, kernel only) and.f 0, r0, _PAGE_GLOBAL or.z r2, r2, r3 ; Kr Kw Kx Ur Uw Ux (!GLOBAL, user page) |