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author | Vineet Gupta <vgupta@synopsys.com> | 2016-09-28 11:53:17 -0700 |
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committer | Vineet Gupta <vgupta@synopsys.com> | 2017-11-21 15:21:08 -0800 |
commit | 82385732b1c9d6a22942b5fe6e48a99891cb806f (patch) | |
tree | cf0c5e5c0ca3f7490eaab51f8346368d24875e9c /arch/arc/kernel | |
parent | 5b9027d6d044d4917992119d184ab0bb616489cc (diff) | |
download | linux-82385732b1c9d6a22942b5fe6e48a99891cb806f.tar.bz2 |
ARC: perf: avoid vmalloc backed mmap
For non-alising Dcache, vmalloc is not needed.
vmalloc triggers additonal D-TLB Misses in the perf interrupt code path
making it slightly inefficient as evident from hackbench runs below.
| [ARCLinux]# perf stat -e dTLB-load-misses --repeat 5 hackbench
| Running with 10*40 (== 400) tasks.
| Time: 35.060
| ...
| Performance counter stats for 'hackbench' (5 runs):
Before: 399235 dTLB-load-misses ( +- 2.08% )
After : 397676 dTLB-load-misses ( +- 2.27% )
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/kernel')
0 files changed, 0 insertions, 0 deletions